Analog Simulation Insights: Analog/Mixed-Signal Simulation and Verification Blog

 

Synopsys AMS technical luncheon at DAC 2016: Robust AMS Design Verification by Samsung, Oracle, ST and Qualcomm

Time of  the year again 🙂

We decided  this year  to focus on the concept of Robust Design for AMS verification. Robust Design is defined as reducing variation in a product without eliminating the causes of the variation. In other words, making the product or process insensitive to variation, which is critical as most Synopsys customers move to advanced technology nodes.

You can extend this concept to multiple aspects of a complex advanced design verification , starting from analog mixed-signal simulation  up to design environment. Because  we wanted to cover those different aspects, we asked some of our key customers to present their challenges and solutions using Synopsys simulators and environment.

During this lunch event,  Samsung, Oracle, STMicrolectronics, and Qualcomm will present their robust design flows and methodologies using Synopsys’ AMS simulators and environment (SAE) and share their design successes while dealing with advanced process nodes.

DAC2016 Synopsys AMS event

This event will be held  on Monday, June 6, 2016 from 11:30 a.m to 1:30 p.m. at the Hilton Hotel, 6th Floor, Austin, Grand Ballroom.

Attendance at this event is free, but registration is required. And in addition to a delectable lunch, attendees will be entered into a drawing to win a set of Beats by Dr. Dre Studio Wireless headphones 🙂

You can learn more about this event and register at:

DAC 2016 Synopsys AMS technical luncheon

As far as  performance in the context of advanced nodes layout and design, you also may want to attend Synopsys Custom Compiler Luncheon, where key customers would present how adopting Synopsys Custom Compiler and its pioneering visually-assisted automation can cut layout tasks from days to hours. Just as a refresh, Custom Compiler was introduced during SNUG 2016 and has demonstrated among its users a very large productivity improvement while  doing advanced technology nodes design and layout.

For more information and to register, you can use the link below:

DAC 2016 Custom Compiler luncheon

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