Improve Analog Verification Productivity Using SAE
For those of you who would like more information about Synopsys’ Simulation and Analysis Environment (SAE), we are hosting a webinar showcasing SAE and how you can use its unique features to improve your productivity. The webinar premieres Feb. 17 at 10:00 a.m. PST and will be available on-demand thereafter). I have asked Deepa Kannan, who is hosting this webinar, to give us more insights.
Deepa is currently SAE the technical marketing manager at Synopsys. She has a strong background in custom CAD tools including schematic entry, simulation environment and simulation tools. Prior to joining Synopsys, she worked at Intel in the Design Automation team where she was responsible for custom CAD flow development as well as the support and maintenance of PDK and CAD tools. Deepa received her B.S. degree from Birla Institute of Technology and Science (BITS), Pilani, India and her M.S. in Electrical Engineering from Arizona State University.
Deepa, could you share with us the primary features of SAE and why people would benefit from viewing this webinar?
Synopsys recently announced that it is redefining circuit simulation by including a native Simulation and Analysis and Environment (SAE) with all of its circuit simulators.
SAE is a comprehensive transistor-level simulation and analysis environment that is tightly integrated with Synopsys’ HSPICE, FineSim, CustomSim and VCS AMS circuit simulators. The environment eliminates the need for any third-party integration of Synopsys simulators and provides full GUI access to all the latest features of the simulators. SAE also offers some comprehensive and unique features, such as the netlist-based flow, full statistical package for data mining, charting, etc., for fine-tuning analog designs.
Today’s analog verification engineers face two major challenges:
- Need for faster simulator performance to reduce simulation runtime while running thousands of simulations needed for extended verification of their designs
- Need for a modern analysis environment for managing these massive simulations and efficiently handling the simulation data explosion
Synopsys has continued to deliver performance improvements year-over-year, allowing designers to keep the simulation runtime within a good range. But the need for a built-in and efficient simulation analysis environment still exists.
The main intent of the webinar is to provide an overview of SAE and highlight some of the key capabilities and unique features of SAE that help to improve analog verification productivity and throughput. Analog and mixed-signal verification engineers will learn how SAE addresses the second challenge I mentioned above.
Thank you very much Deepa! I’m sure many people will find this webinar to be very informative.
You can register here to attend the webinar.
