DAC Synopsys AMS Technical Luncheon Panel – Complex Mixed-Signal SoCs: How to Conquer the Next Verification Frontier

DAC is here and we are ready!

You may have seen at SNUG that we announced VCS AMS, Synopsys advanced mixed-signal verification initiative to enable faster regression testing of Mixed-Signal SoCs.

We therefore decided to focus our DAC AMS luncheon technical event on VCS AMS. As a result, we have a very impressive panel of industry experts composed of AMD, Infineon, Micronas and STMicroelectronics. They will share their experiences and methodologies and highlight VCS AMS as the best mixed-signal verification tool available for today and tomorrow SoC designs (not my words, they did tell us without any torture or bribes :)).

Our speakers are (in chronological order):

Micronas : “Verification of Analog-on-Top Mixed-Signal ICs”

Infineon: “Power Aware Mixed-signal SoC Verification using VCS AMS”

AMD: “Exhaustive Verification OF Mixed-signal Designs using VCS AMS”

ST Microelectronics : “VCS AMS in STMicroelectronics”

Those presentations will portray Synopsys mixed-signal verification solution for performance, flexibility, advanced verification and low power capability, as shown by the table below.

Because we wanted to offer a depth and breadth of understanding of verification challenges and related solutions, this AMS lunch-on should be extremely valuable to anyone involved with advanced mixed-signal verification and/or looking at extending their digital methodologies to mixed-signal.

To register to this event you don’t want to miss – of course you don’t – you can use the link listed below:

http://www.synopsys.com/Tools/Verification/AMSVerification/Pages/dac-2014-ams-verification-luncheon.aspx.

Hope to see you there!