Posted by Hélène Thibiéroz on August 9, 2012
If you read my blog or other EDA related blogs, you probably have already figured out that verification, specifically for mixed-signal designs, is getting increasingly complex. Different variables have to be taken in consideration: complexity of your design environment or topology, high-volume of regression runs, simulation speed are just a few of those . The verification methodology has also to support multiple languages, and work with different netlist formats available across the industry. As such, there is a crucial need for an integrated mixed-signal verification environment that focuses on functionality, reliability, and performance.
Well, today is your lucky day, Synopsys has such a tool :). CustomExplorer™ Ultra (CXU), is a GUI- and netlist-based verification platform that helps automate Verification regression tests without manually creating different configuration files or scripts.
I therefore wanted to give you more technical insights and some direct feedback/experience from design engineers. AMD recently presented a paper at SNUG 2012 in collaboration with AMD on how to overcome challenges inherent to a mixed-signal verification environment using CustomExplorer Ultra. In this interview, George Kuruvila from AMD talks about this paper and the specific CXU differentiator features for mixed signal verification. From the Synopsys side, Rajagopal Sundararaman and Manu Velayudhan Pillai provide their insights on this successfull collaboration.
George Kuruvila is a Design Engineer at AMD. He has 4 years of experience in IP verification and mixed-signal verification and is deeply involved in functional verification of analog macros at AMD. His areas of interest are Functional verification, Verification methodology, Mixed-signal verification, tools & flows. His hobbies include playing badminton and cricket.
Manu Pillai is currently working as a Sr. Corporate Application Engineer with Synopsys, Analog & Mixed signal group. He has 12 yrs of experience in the EDA industry with 7 yrs in Circuit simulation.
Raj Sundararaman works as a Staff Applications Consultant specializing in AMS. He has about 15 years of experience in the semiconductor industry including 9 years in analog circuit design.
Q1- Could you please describe your job responsibilities? What kind of circuits do you typically design (George)?
George- I am responsible for functional verification of analog macros, including analog spice level netlist driven verification. I own the functional verification of macros like PLLs, analog IO pads and analog sensing units at IP level.
Q2- Can you describe AMD mixed signal verification methodology being used today (George)?
George- Our mixed-signal verification methodology is to use a digital simulator such as VCS along with a fast SPICE simulator such as CustomSim. The digital block is represented either using RTL or logic gates. The analog block is represented using SPICE netlists (Spectre/HSPICE formats) which is directly instantiated in the VCS environment. We normally use a digital-on-top methodology where the top-level netlist is Verilog (just guessing!)The stimuli from the testbench are driven to the digital block. However, the mixed-signal configuration (VCS-CustomSim) converts the digital signals into analog inputs or vice versa at the interfaces between digital and analog blocks. The focus is on the analog-digital interface. A mixed-signal configuration file is used to select d2a and a2d strengths during conversion. Similarly, a fast-SPICE configuration file is used to configure the fast-SPICE simulator accordingly.
Q3-Which verification challenges you are facing today and which will you be facing moving forward? How is CustomExplorer Ultra addressing those challenges? (George)
George- The list of major challenges with our existing mixed-signal verification methodology can be summarized as below.
a) Configuring blocks to pick analog/digital views:
CustomExplorer Ultra’s Design Import and Multiple View Selection feature helps to import many different netlist formats from almost any design environment or netlist source.
b) Simulation over multiple PVT corners
CustomExplorer Ultra’s multiple-corner selection option allows for multiple PVT settings for a single design configuration.
c) Checker implementation
Implementing complex checkers to analyze the design is very easy in CustomExplorer Ultra. We avoided a lot of visual and post-processing checks using several built-in equations that come with CustomExplorer Ultra.
d) Dynamically changing simulation parameters
CustomExplorer Ultra offers multiple test environments that could have different settings. This allows users to create completely different test environments without having to create or edit configuration files.
e) Requirement of high volume regression runs
CustomExplorer Ultra offers an excellent environment for setting up multiple tests and simulation corners. After set-up, simulation jobs are automatically generated and queued extremely efficiently.
Q4- Can you describe at high-level the paper you presented at SNUG 2012? (George, Raj, Manu)
George/Raj/Manu- There are several challenges associated with our mixed-signal verification as listed above in the previous question. The paper “Advanced Regression and Verification of Mixed-signal Designs Using CustomExplorer Ultra” talks about how to overcome these challenges using CustomExplorer Ultra. This paper demonstrates (with illustrations) how CustomExplorer Ultra complements a strong CustomSim/VCS mixed-signal verification solution to tackle these verification challenges.
Q5- What are the unique features of CXU for Mixed Signal Verification? (George, Raj, Manu)
George/Raj/Manu- Most of the features in CXU have been extremely useful. We extensively used Design Import and Multiple View Selection features in conjunction with Multiple-corner Selection. Debug features like Signal Cross-probing, Waveform Comparison and Result Analyzer proved quite powerful. We could also replace our ad-hoc regression scripts with features meant for Simulation Job Control. Because of all these features, CX-U can be thought of as a complete system and regression environment as compared to just an analog design environment.
Thanks to George, Raj and Manu. if you want to further look at their SNUG paper, you can access it using the link below: