Analog Simulation Insights

# Taxonomy of analog properties.

Sorry.. that “big word” just slipped out here. Let me explain.

As I discussed here recently (AMS assertions and more…), the Accellera AMS Sub-Committee has begun discussing a proposal to extend SystemVerilog for mixed-signal assertions. This “assertion” thing comes from the world of digital verification, so the first order of business is to develop some meaningful definitions of how the concept would apply (if it does) to analog and mixed-signal. It turns out that there is a lot of very intellectual leading-edge research already underway in this area. Wading through some of the research papers, full of such arcane terms as “predicates”, “dense time”, and “reachability”, tells me that we have a long way to go to translate the work into something that has practical meaning for analog designers. Why, reading through all the abstract algebra makes me crave the smell of molten solder just to get back to what it’s really all about… electronics!

So – taxonomy – that’s just a fancy name for a categorized list. Assertions are used to check “properties”, so we are agreed that we should first develop a list of WHATkind of properties AMS circuits have, before we try to develop a language for HOW to verify them. N’est pas?

Many a new methodology has failed to reach adoption because it was a solution in search of a problem (and I still have the wounds from trying to launch one or two myself). When you look at how “analog meets digital” here the truth is that “analog property” is a misnomer, or at least not broad enough. What we are really concerned with is verification of electrical properties… because the goal is to build working electrical circuits be they analog or digital. Digital assertions only address logical properties along with their associated (discrete) timing, because that is all that a “signal” is in the digital world. If we try to fit analog signals into this digital solution; i.e. Assertion-Based Verification (ABV), would we solve a real problem?

To further that discussion, here is my contribution to a taxonomy of some electrical properties of circuits that must be verified in order to be successful in silicon. You contributions and input are very much invited.

### Taxonomy of Analog & Electrical Circuit Properties

1.Connectivity properties

This category might be thought of as the basic ERC, or electrical rule checks, but given the complexity of modern fabrication processes it can get much more complicated. Examples of simple connectivity properties are proper bulk connections for NMOS/PMOS devices.A more complicated electrical property comes from the prevalence of multiple voltage-domain designs. The circuit must be checked to ensure that no low voltage device is connected to a higher voltage supply than it can handle reliably.In this example, a transistor has a physical property that must be tested against an electrical property of the circuit it is in. Simulation alone can miss this.A tool like Synopsys SpiceCheck traces circuit connectivity and checks rules associated with each device model type in a design.

2.Static electrical properties

With power-managed designs many transistors do not even have a direct connection to a power supply rail. Circuits can be put into standby states where nodes are inadvertently allowed to float, causing potentially destructive leakage paths. The time constants associated with this type of phenomena are too long to be tested in a dynamic simulation, and there is no “signal” to check.Synopsys CircuitCheck performs vectorless voltage propagation to verify static electrical properties. There are other examples as well where this type of verification technique is required to increase verification coverage, and to have observability of behavior that dynamic test benches may miss.

3.Functional properties

Pretty simple perhaps, but how do you know that a circuit implements the specified function? If we were to automate functional verification, this type of property needs to be included.In digital, the function is defined directly in the design language and formal verification can be applied.SPICE, the primary analog design tool, doesn’t work that way.Reading a netlist doesn’t tell you what the function is, except in very simple cases where you could basically reverse-engineer the schematic. A simple example of an analog functional property is amplifier gain, and any other transfer function property would be included in this category.Some research on this type of functional verification assumes that a functional model is available in an AMS HDL.See Towards Assertion Based Verification of Analog and Mixed Signal Designs Using PSL for example.Complete A-HDL models are still used infrequently however, and the problem of checking the model against the implementation (in SPICE) still would need to be addressed.

4.Signal properties I: single-event temporal properties

This category of analog signal properties is the most like what you would see in a digital assertion. Examples are settling time and other types of time-windowed dynamic signal behavior; overshoot, undershoot, slew rate, etc. The .MEASURE functions in HSPICE pioneered an automated mechanism for checking this type of circuit property.

5.Signal properties II: cumulative temporal properties

This type of property includes behavior that requires many measurements of multiple signals, sweeping over time and-or voltage/current in order to test. Examples are dynamic differential and integral linearity in an analog-digital converter, jitter, eye-width in a SERDES bit stream, etc.

6.Signal properties III: frequency domain properties

This could perhaps be included in the type II signal properties, but I break out separately the type of AMS circuit properties that are derived through frequency domain transformations. Anything to do with harmonic distortion, signal-to-noise ratio, filter cutoff frequency, etc. falls into this category.

7.Mixed-signal interface properties

The use of digitally-controlled analog circuits is increasing; because digital transistors come very cheap on nanometer processes, and because those processes tend to produce analog behavior with too much variability to be useful without adjustment.Any property where an analog value on one side of the mixed-signal interface should match to a digital code on the other side fits into this category. An ADC used for measurement purposes, a digitally calibrated current-DAC, etc. are typical examples.

Can we develop an assertion language that would cover a significant percentage of the behavior that needs to be verified in AMS circuits? Measurement languages have been tried before. Can this be more than an academic exercise?

I am looking forward to further discussions that will hopefully lead to better verification solutions when “Analog meets Digital”.

-Mike