Posted by mike demler on June 24, 2008
That was the question I asked attendees at the Synopsys AMS breakfast panel meeting at DAC on June 10. Let me say right up front that I am aware that self-selection bias can be a factor in surveys such as this, but I think you will find the results to be interesting nevertheless.
We have been hearing from several writers and self-described EDA experts lately, who have accused the EDA industry of lagging in providing solutions for analog design, claiming that analog design automation needs to “catch up” with digital design automation. By catch up here, they are referring to design implementation – which of course means the synthesis, place & route that is the basis of most digital design flows. I have written about these misconceptions of the non-cognescenti several times before, most recently in Does AMS need its own year?
So then, why did 75% of the participants in this survey say that Verification is the #1 issue versus only 13% for analog synthesis, and a meager 6% for AMS process migration? Perhaps because these folks are the cognescenti… the people who personally take on the challenges of AMS design and verification on a daily basis.
The population of respondents and their preferences is very telling, I think. We had a good mix of attendees; who described themselves as involved in either analog or digital design, verification engineers, CAD engineers, or other (such as CTOs, foundry engineers, analysts, etc.).
Of the self-described verification engineers 100% stated that AMS Verification was the #1 issue. One could argue that is no surprise, since the topic of the breakfast panel discussion was AMS Verification and Moore’s Law… solutions for 45nm and beyond. But, the survey did provide an opportunity to select “Other” as the greatest need, and nobody selected that option.
Looking at the response of designers in attendance, 86% of the analog designers said that AMS verification is their biggest issue. Now these are the people that would use analog synthesis or process migration tools, so I think that is especially significant. I believe that analog designers understand very well that process migration requires a lot more than re-sizing devices with some optimization algorithm. Topology changes are inevitably required when voltage levels drop and those stacked cascode structures no longer work – for example.
Digital designers also indicated that verification was the most important issue in AMS design, by an 80% majority. The chart that I showed in my last post, things heard at DAC – day 3, apparently rings true with the designers who know best what happens when analog meets digital.
Finally, the CAD engineers and managers chose AMS verification as the #1 issue by a 68% majority. It should come as no surprise that CAD engineers made up most of the small number of respondents who were interested in analog synthesis.
So… there you have it. What, in your opinion, is the single greatest need for enhanced EDA solutions in AMS design? As always, all responses and opinions are welcome.