Posted by mike demler on June 11, 2008
Tuesday started very early, with the AMS Verification Breakfast , on the topic of AMS Verification and Moore’s Law, solutions for 45nm and beyond. People were lined up when the doors opened at 7:30AM, and we had a full room. The panelists did a great job, and there were so many questions from the audience that we had to stop to fit in the raffle for the 2 iPod Touch MP3 players.
Some questions & comments from the breakfast:
Later in the day, in regards to Verilog-AMS, I heard this comment: “Most people think that AMS verification means FastSPICE-Verilog co-simulation”. That tells me that the requirement to develop models in a behavioral language still keeps V-AMS as a niche application, and at the same time Fast-SPICE eliminates the need for V-AMS in a lot of applications. From 7:30 AM until 6PM when I left the convention center, I could not get away from the topic of how “Analog meets Digital“. I think we are focused on the most important issue in AMS design today. I had several conversations on the analog assertion topic; with customers, other EDA vendors, and from individuals interested in developing standards and extensions to System-Verilog VMM. I would love to hear from you hear to keep that discussion going.