Archive for the 'Algorithm Design' Category

By Johannes Stahl

In his book “Hot, Flat and Crowded” the author Thomas Friedman gives us a comprehensive perspective on the fundamental equations this planet operates from. He connects population, natural resources, energy and information technology into these equations. One of his conclusions for energy production and consumption balance is to have a systemic approach, which optimizes the system from the top level with intelligent energy generation, distribution, storage and consumption. He warns that our current system for energy production and distribution is largely overdesigned for delivering peak capacity 24/7.

Nobody designs electronic products from a power perspective with the same energy waste today. Energy is either very limited (mobile devices) or expensive (infrastructure). Semiconductor companies are doing a lot to optimize energy consumption from using the best low power silicon processes, efficient micro and macro architectures and advanced, software-driven power management. By implementing all of these approaches at the software, RTL and transistor levels, semiconductor companies have been able to squeeze an amazing amount of processing power onto single chips.

Is that enough? Have we managed power every way possible in the best possible ways? Maybe not. Here are a few experiments for the undecided:

¡ 1st: Use your smartphone to browse, comment on, and update your Facebook feed and see how long it takes to empty your battery that way.

¡ 2nd: Take several HD videos of your incredibly entertaining kids . I recommend keeping a sharp eye on your battery level and wearing a glove on the hand holding the device.

¡ 3rd (for next year): Use your LTE enabled smartphone and stream a movie from the internet.

What is going on here? Clearly high-speed video and the related high-speed wireless access are the main power drains on you battery. This trend is only going to accelerate in the future, as 3D video and LTE-A will be experiences consumers will want to pay for.

All of these experiences have one thing in common – Lots of digital signal processing. The only way to achieve the best signal processing algorithm is to start telling the algorithm designers that they have to be power conscious and optimize their algorithms much more than they used to for performance and power.

So if you want to save big, go and talk to your algorithm design teams. They need both some recognition and some well-deserved pressure to save your day. As Friedman said, “either we are going to rise to the level of leadership, innovation, and collaboration that is required, or everybody is going to lose big.” The winners in the semiconductor space will be those that rise to the challenge of designing to save energy at the algorithm level.

As for sure you have noticed, Synopsys has made some key investments into the System-Level space with the recent acquisitions of VaST Systems and CoWare. Going forward we will have more guest comments and views on this Blog from the other members of the System-Level team. To start it off, Johannes Stahl – a long term expert in the System-Level space – provides his “View From The Algorithm Top” on some recent developments in the next generation wireless space. Johannes joins Synopsys from CoWare. Welcome Johannes!

Creating Revenue from Spectrum – Algorithms and Software are the key

By Johannes Stahl

When a piece of land in your community gets rezoned to become a housing area this land becomes more expensive for developers as housing zones are still a scarce resource. Very similar wireless operators go out and acquire expensive spectrum to provide their services to you. They need to utilize this scarce resource it in the most effective way.

The whole war for standards in the wireless domain is about who controls the spectrum and in which way this enables controlling the entire eco system for delivering services to consumers. A well known example of top level control has always been the Chinese government, who has fostered local Chinese versions of communication standards. When WCDMA was adopted by the world, China would create the TD-SCMDA version of it and around that operators like China Mobile would be able to drive their supply chain providing solutions.

The history only seems to repeat itself with the upcoming LTE standard. The TD-LTE version of the standard, which uses a different way to allocate spectrum and time to the individual users compared to the general LTE standard (also known as FDD mode), is again being developed for the local Chinese market. But interestingly enough TD-LTE will now also apply for other countries as the spectrum allocation being offered by those governments is similar to the spectrum structure required for TD-LTE (in communications theory lingo this is spectrum called ‘unpaired’).

TD-LTE and LTE (FDD) standards require very similar physical layer processing requirements, so that even with a split into two versions the eco system will be quite capable of providing cost effective solutions based on scalability. Although the standards are very similar, they are definitely not identical. This poses two challenges for the developers of baseband solutions.

For both standards the performance characteristics of the physical layer, which is largely determined by one parameter – the system throughput – will require optimization of the detailed signal processing that is used to drive the specific spectrum allocation and hence the reconstruction of the received signal. This is by no means trivial and requires 1000s of long simulations with millions of test vectors. Better algorithms, better performance, more revenues for the operators. Time and effort well invested by the supply chain.

The implementation of chip sets that can span both standards (and maybe even WiMAX) is evenly challenging, as high data rates requires optimum signal processing architectures and at the same time switching between standards asks for software programmability. All of the above at the lowest power to satisfy you as a smart phone user. From a design perspective this means actually going back and forth between algorithm design, architecture design and software implementation in order to achieve the design goals.

If you are responsible for baseband products at a semiconductor or handset manufacturer you better off being equipped with integrated system-level design solutions to get your product into the LTE market with predictable success.

Consumer device innovation seems to happen at a brutal pace day by day. Take one of the most recent examples of a new gadget, the Samsung Memoir Digital Camera Phone, which again pushes the envelope of usability and connectivity.

If you have product responsibilities for consumer devices and you present your 2010 holiday season product vision, hwoever chances are that your CFO does not really care today. Your well thought out ideas and plans, which three months ago seemed to be close to getting started, now seem to be in the very distant future.

Welcome to the cost-driven economy! Short-term returns, low-risk projects, predictable success, lower growth at much lower expenses. Is your CFO making the product design decisions for you?

The reality is yes! The CFO makes that call. Your CFO looks at your historic product development costs. He or she will see a “cost cone,” starting with little investment in product research, sometimes called pre-development, followed by huge chunks of money once a product becomes committed to detailed chip design and software application development.

Even worse, the history of design projects will show a fair amount of false starts or late redesign requirements, which either kill the revenue or blow up the cost, or both. The only way your CFO is going to get the cost under control is to allow less of these expensive development projects.

If you have only one silver bullet for your 2010 product line, what should it be? Are you specifying a more conservative product because you don’t think engineering will be able to handle the higher risk with the more ambitious product specification? Are you sandbagging your performance margins as an engineering manager because you don’t know if you can squeeze it out of your back-end design process with acceptable risk? Regardless of which side you are on, the cost-driven economy puts you in a big decision dilemma.

Fortunately, you can turn to your software and hardware architect experts. Really? Embrace yourself for a big “maybe” about the product performance. Are you planning to integrate a hot new piece of software or hardware IP into your platform? Will it differentiate your product like you expect?

How much overrun in schedule (and cost) will it cause you because it’s difficult to get it to work in your new platform? The more you discuss your plan, the more questions pop up, and you have not even started implementing anything. The hardware team is already knocking at your door with the need to get started. Meanwhile, the software team keeps on polishing their software for a platform that’s unknown!

In a cost-driven economy, you can choose to keep on doing what you have been doing. Nobody will complain, because taking the same approach is considered as not taking a risk. Unfortunately, you realize that continuing in the same old fashion is actually very high risk, but at least you can not be blamed for it.

The choice to change
Or, you make the choice to change – to change now, because of the cost-driven economy, not in spite of it. Because of the cost pressure, you decide to make an extra investment of time and money which is spent up front in your design process. You do this because you are convinced that more effort spent in the early stages of a design will generate fewer headaches down the line in the detailed implementation of hardware and software.

What are you going to invest in? First, you want to get mileage from your existing IP investment. With modern IP blocks containing hundreds of parameters, and your specification including dozens of applications and use cases, it is imperative to study the performance of your architecture in a systematic way, specifically under the influence of dynamic workloads. You don’t want architects to model dynamic behavior of your architecture with adhoc methods.

You prefer a reliable, repeatable approach, which is as solid as your favorite RTL-to-GDSII design flow. You want a server farm exploring your architecture performance by doing massive amounts of scenario simulations and automated analyses of the results from these simulations.

After you are done with your architectural decisions, you can launch your RTL implementation team, but what about the software team? Can you afford to have them not working on your new project while they wait for RTL in an emulator or an FPGA to become available? Again, it is up to you to invest into a new methodology to save project costs and reduce risk through schedule acceleration.

Let some of those hardware architects work with the software team to quickly come up with a first, high-level model of the new architecture. Equipped with a systematic modeling methodology and with IP models from your IP vendors that fit into a standards-based modeling approach, your team will be able to bring up a virtual hardware platform in less than a month. This is enough to get the software team started with driver development for operating system porting.

By the time you are 6 months into the project, you not only have a solid hardware architecture that you know and that will deliver the performance you expect, you also have a number of software applications running on your virtual platform models. Equipped with a solid spec and demonstrable software applications, it will be much easier for you to win that design socket.

When this cost-driven economy picks up again, you will be ahead of your competitors, not only because your project is ahead of theirs but because you have made an investment that secures your continued competitive edge. In a cost-driven economy, you can take the lead in design cost reduction–and win. Your CFO will thank you for that.

Let’s get 2009 started on a good note. Happy new year to everyone and I hope it will bring you what you are looking for.

By now, we all know that 2008 was a recession year and analysts are forecasting that it will continue into 2009. So, should we expect a bumpy year in general for people designing hardware and software? Most likely the answer is “yes.” But, I also believe that such years are a good platform for discussing and evaluating what needs to change. Hardware and software design should not be left out of this. A recent NPR report made me think about the opportunity these tough economic times provide.

The report was about recycling. With the economy slowing down and being in a recession, the demand for recyclable materials has been reduced and recyclable material is being stored in warehouses until the demand increases again. The point of the report that was interesting to me was not necessarily the recycling aspect, but the fact that the people interviewed were talking about how they needed to adapt and change the way things are done in this industry with one interviewee pointing out that an economic downturn was necessary to force the change.

So, does this apply to electronics (hardware and software) design? Why wouldn’t it? It absolutely should be the time for the industry to review and implement new design and development approaches. Traditional approaches using RTL and using physical hardware have reached their limitations, but without the pressing need to reduce costs due to high demand, the industry may not have felt compelled to strongly research and implement the required changes. Now is the time, multicore designs are creating havoc, cost reductions and doing more with less resources is pushing it forward.

Let me know what you think!

Welcome. System Level Design is gaining significant momentum and a community discussing and sharing knowledge about system design is needed. This blog will invite several authors from multiple backgrounds and functions to discuss and comment on system level design.

So, come back often and let us know what you think.