Archive for February, 2010

The Barcelona sun finally starts to arrive and helps to put the serious business being conducted here into a supportive environment. The best deals are being cut at the outside coffee table. The forward looking roadmap conversations happen by sitting together on the fountain walls.

Mobile is a massive business. Indian software services company WIPRO employs about 1,100 engineers in the mobile practice software services alone. As their general manager Arvind Jayabal points out they prefer doing their work in the fully green oriented WIPRO facilities rather than being forced to work at their international customers facilities. One forcing function for that is the infrastructure to develop software, like specific development board, which may only be available in limited quantities and locations. Virtualization of electronic platforms should be able to solve this problem soon.

Not less massive – from a booth perspective – is the appearance of Microsoft’s new Windows Mobile OS. Even on day 3 a faithful crowd of visitors listen to what the moderator has to say about the great features of managing your social life. You can aggregate all of your friend’s data from your own address book, calendar and FaceBook. Looks very cool. Many people are listening to this while happily typing an e-mail on their Blackberry or checking FaceBook on their iPhones….

Mobile video remains an interesting topic throughout the show. CEVA showcases their newest flagship, dual core DSP. The two DSPs are actually performing different tasks within video processing and have been optimized for those using the latest processor design technologies in this area. The CEVA CTO, Erez Barniv, points out proudly that a full rate 1080p HD video can run on an FPGA implementation of their DSP at just 50 MHz clock speed. This provides a promising outlook to using this new core for actual handset chips. DSP industry analyst Will Strauss stops at the demo and is significantly impressed by the technology as well.

Cambridge based mobile IP leader ARM is presenting several netbook products in their booth. More and more of their Chinese customers require them to predict performance for a specific set of target product constraints. ARM is addressing this through their sophisticated traffic generation tools combined with their partners providing the exploration and modeling technologies for ARM’s interconnects. They also point out that significant breakthroughs on the software side are necessary to keep their Santa Clara competitor on a distance in their home market. “They told us, before you can do Flash, you can’t sell real computers. Now we have it. What is their next challenge?”

The green topic in terms of power consumption continues in the infrastructure market. If you are dialing 911 from your cell phone in the US your location information should better be true. TruePosition is the provider of pizza box sized electronics that AT&T and T-Mobile are putting on their basestation towers to calculate your position from relaying several basestation measurement data. Many of these types of infrastructure systems are today being implemented using a combination of FPGAs and DSPs. The race for getting all the ‘green content’ is on between the TI and Freescale and Xilinx and Altera. In the end only the innovation of the system OEMs to advanced algorithms, software implementation, hardware implementation or custom processor design is making the green difference. The semiconductor companies just deliver the basic ingredients.

Away from the business discussion into the consumer view again one booth caught a significant attention, mostly because of clever marketing. The booth for “Powermat” was entire closed with the exception of a small entrance where customer had to line up for badge scanning. The process was deliberately slow, so a busy line would form. The product concept? Put your Smartphone into an additional protection sleeve that contains a power plug and a wireless charging device. Carry around a much bulkier phone all day so that when you come home you can just drop it on the Powermat, where it charges. Spend lots of dollars on ‘new sleeves’ for each of your device and discard the included charged from your device. If they can stay in business until the phone manufacturers will include the technology into the standard phone package this maybe interesting.

In the end business managers return satisfied from the show. It is a worthwhile concentration of decision makers in the industry. They have their calendars marked for 2011 already.

Orientation on the second day is a lot easier. Enter hall 8 where the titans of the industry play. Make a right at docomo, go straight to Research in Motion and head straight into leader Nokia? Hold on, Nokia was not exhibiting this year at the event! They offered a comfortable Rikscha ride from the Fira to their meeting place. Even though they refrained from the race to show new hardware, they made a significant software announcement with Intel to merge their Linux efforts into one. This again underpins Intel being serious about their Atom strategy for the mobile market.

So what was the stretch in this day? It was the low-end to high-end stretch. On the high end you would find small software players such as a Swedish company, Ikivo, specializing in high performance user interfaces for selecting from your address book or list of songs. Or specialized IP companies like Chips & Media from Korea producing high performance video IP. Of course the big semiconductor companies play in the performance game, such as TI with their OMAP processors. You wouldn’t expect that this processing power is actually needed to drive something as simple looking as an eBook reader, where the display update speed for the sophisticated low power displays is heavily influenced by the digital signal processing done by the processor. What do all of these examples have in common? It’s the combination of performance of software and hardware. It is critical for this industry to optimize both. Many times it can be done using virtualization technologies sometimes it will require additional subjective testing for the final selection as well.

On the low-end Vodafone announced the $20 retail phone (note – this is without subsidies). Customers can do voice and SMS with it. Imagine the amount of hardware optimization that will produce silicon at that cost level. Not only phones need to be extremely cheap to serve the underdeveloped areas, the network infrastructure needs to very affordable as well. Indian developer VNL demonstrated the low cost, rural area GSM infrastructure, which is using solar powered repeaters to get the GSM signal out into the country side. They are able to provide network operators with revenue even at ARPU of $2. Here the simulation of the physical layer for GSM is critical as it determines how far the operator can stretch the equipment. The chairman of the company told me that a local team of construction people can put the battery, solar and antenna on a roof top in just under 4 hours.

If you think the hardware and software content solely drive the technology edge, Samsung proves that you are mistaken. Their ‘Wave’ phone displays the brightest color with the lowest reflection and the easiest touch in the industry. It doesn’t look like they will license their ‘super-AMOLED’ technology anytime soon to their Cupertino based Smartphone competitor.

To deal with the complexity increases, the abstraction level at which the design entry happens, has evolved over the last 30 years. In my first blog posts I had reviewed the evolution from transistors to gates to RTL and now to the transaction level. In Slartibartfast’s world this evolution of granularity (the level at which designers think) is equivalent to designing at a building floor plan level, house level, street level and city-level as indicated in the graph on the left.

In the good old days, Slartibartfast’s employer was an integrated design house called Texas Instrumentus, TIUS. They were doing everything from the design to the actual manufacturing of the projects to be used on various planets. TIUS at the time even had a set of design tool developed in-house, helping Slartibartfast to design the 500 houses and connections they had to do at that time in average. The automation tools were purely graphical and once a design was finished, a data file (called GDSII) was sent to manufacturing who would produce the specified worlds en mass.

Given the complexity increase from 500 houses 30 years ago to 10 billion today and a projected 500 billion in 10 years, productivity had to increase quite a bit. The oracle ITRS does not only think stuff up about the future, they also have a team of historians documenting the past. Just yesterday Slartibartfast had pulled up some of the old ITRS records to explain to his intern, that in the last 15 to 20 years alone design productivity has improved 580% through re-use and 336% through methodology improvements. And yes, in addition engineers have become “tall, thin and smarter” too

Design automation had a major role in productivity improvements. Back in 1979 Slartibartfast and his teams were drawing each house individually using schematic entry, defining the exact positions and connections manually. Design automation soon invented automated layout. Only the positions needed to be defined and then automated layout tools would automatically create the connections. Later on, at the building and street level, logic synthesis allowed to describe the intended design using a language defining all the houses, functional units and their individual connections. The logic synthesis tools would then suggest an implementation of the desired functionality based on speed, area and power consumption constraints set by the user.

In addition, re-use played a crucial role. Instead of designing each portion of the bay area by hand, the basic building blocks were pulled from pre-defined libraries. At first, for “small block re-use”, libraries of basic design elements were introduced in about 1997: kitchens, bathrooms, hallways, gardens, doors etc. Later, for large block re-use starting about 1999, complete houses, town homes, theatres, schools, streets and intersections increased productivity even further. Very large block reuse really just found its adoption  a couple of years ago around 2007. Now re-use happened at a much larger scale. For specific interfaces, like for example the interface to the sea called USH (Universal Serial Harbor), it really did not make sense to design it from scratch every time. There were Intellectual Property (IP) providers, who could provide design teams with pre-defined USH designs ready to be included. They typically had even tested them using various manufacturing technologies so that Slartibartfast and his teams did not have to worry about it. The Oakland harbor is a good example, Slartibartfast fondly still remembers the negotiation with SYNOPYSOS, the biggest supplier of connectivity IP, from which he had bought the Oakland USH interface and it immediately worked perfectly.

Design for sure has changed over the last 30 years and at times if had been difficult for Slartibartfast to keep up with all the new tools and methodologies. The next installment of this series will deal with simulation and verification. Not only does the bay area need to be implemented fast and on time, but it also has to be verified and validated. That means it has to do what the specification requests and it also needs to meet the customer’s intent. In order for this to happen, we will discuss technologies for simulation and verification in the next blog post.

For those US visitors that came to the Fira de Barcelona this year with the blurred vision from comparing coverage maps in the never ending Verizon vs. AT&T commercials, they were up for a surprise! Vodaphone, the European operator counterpart, is much less embarrassed to push Femtocells as the recipe against missing coverage. Of course all of us in the software industry have known this trick for years, turning a bug into a feature.

This year’s MWC event is again the marketplace for the mobile world of tomorrow. 45,000+ attendees are lining up in front of the newest gadgets and applications (and the spare foodcourts). One would think that the most useful innovations are the software applications, such as the next Dolby implementation for mobile devices demonstrated in comfortable chairs playing Avatar trailers. The most eye popping innovation today actually was the concept demo from Japanese leader docomo. They showed a headset picking up the eye movements of the user to control the connected audio device operation. There was still room for improvement though as the poor Japanese engineer demonstrating it had to work pretty hard with his eyes. A lot more pleasant to look at was the concept packaging for the next generation phones from docomo. It was a handy roundish shape and it was made out of spare wood produced as a natural product of thinning out the Japanese forests. Already today you can buy ‘the leaf’, a biodegradable protection for your iPhone, made in green Ireland. It will disappear in your backyard in 1-5 years – but don’t try this with your iPhone itself.

Let’s come back to the capacity question. Aditya Kaul from ABI research was hired by the Femtocell Forum to present on trends for these new pieces of infrastructure that today help out operators with coverage, but could become the panacea for their capacity problem. From today until 2015 it is predicted that the gap between peak and average capacity offered by the basestations deployed will increase 90-fold. That means for people living in dense areas, they may show five bars of signal strength on their Smartphones, but they will never get their 1080p movie to upload to their FaceBook page because of lacking local network capacity. For 2010 ABI predicts only 1,000,000 units of Femtocells shipped world-wide, but this number may need to increase dramatically.

Another way of increasing the capacity is being demonstrated by the wireless patent producer Interdigital Communications. Their VP Air Interface and RF Systems, Ariela Zeira, explains at their booth about advanced handover using ‘fuzzy cells’ or traffic aggregation mixing cellular and WiFi transports to maximize bandwidth.

Also Xilinx is happily positioning their LTE Targeted Design Platform for the entire range of eNodeB designs including Femtocells. If you walk onto their booth and get a demonstration of their reference design they will point out that “you will not find a DSP as part of our solution, it is all being done with IP implemented in Virtex-6”. I kind of expected that, but was disappointed not to see a power meter for their solution, which would have put their product right into the context of the other green solutions I mentioned before.

Finally the participants are not greeted by a green, warm spring. Coming in transit from the winter-stricken Germany, I had hoped for something much better. Well, back into the busy halls of the MWC then, tomorrow.

I have been interacting with a lot of colleagues from legal and corporate business development lately. They were wondering what Electronic System-Level Design – or ESL – is all about. Like in a previous post on hotels in Bali, I have been using analogies a lot to explain the advantages of ESL and the reasons for it becoming more and more necessary. Now seems to be a good time to start a series of blog entries to liken system-level design to some real world challenges. This first entry will focus on the challenges motivating while design has evolved over time.

Imagine you are Slartibartfast. Yes, that’s a major nerd-alert here.But then again, I am writing this at 5:30 am before my daughter gets up so I can geek off all I like. Slartibartfast is this cool character in Hitchhiker’s Guide to the Galaxy, who’s task it is to design earth. He is famous for the design of the fjords found on the coast of Norway, won awards for it, but I digress. Imagine you are Slartibartfast, you are standing on Mount Hamilton and your task is to design the Bay Area. How would you go about it?

So your design canvas looks like the picture in the attached. The landscape is done and cannot be changed anymore. Now your task is to create the cities. Your customers come with key requirements, like how many cities they want, how big they have to be, which functions they serve and how they connect to the rest of the area (i.e. how many bridges there are into Marine County etc.).

You have had this task since 1979. It is 2009. After 30 years you are thinking about retirement but your intern is asking you how to prepare for the next 10 years of design. That makes you think about your retirement even more because you are wondering how you survived the last 30 years of challenges. You had to deal with huge changes with respect to sheer complexity, speed and power consumption and things are getting way worse going forward.

Let’s compare the task at hand with Chip design. Back in 1979 your customer had commissioned this design called 8088. The basic building block you were thinking about during the time was called a “transistor” and the 8088 had 29,000 of them. About 104 of those were making up a set of 4 town homes to store things (i.e. 4 bit registers in chip lingo). That means that the Bay Area in version 8088 had roughly 1000 houses (if it were only houses). With connections and other essentials those were only about 500 houses or so to deal with. Sounds manageable.

Almost 30 years on, in 2008, you had to deal with a design of the Bay Area called “Tukwila”. It had about 2 billion of those basic “transistor” building blocks. To put this in perspective, these summed up to about 10 million houses you had to cram into about the same area. You also had to do it in about the same time they had given you for Bay Area version 8088. Of course the design automation tools to design all this have evolved, but still, your personal productivity has had to improve quite a bit too. Your intern came back from visiting the oracle called ITRS and apparently about 12 years from now, in 2022, customers are expected to ask you to cram about 500 million houses into the same are. Time to retire!

Complexity is not the only challenge. Speed is another on. To operate our imaginary Bay Area there is a master “clock”. Everybody listens to it like to the drummer on a Roman battleship defining the rowing speed. Compared to the clock in 1979 in Bay Area 8088, in 2008 the clock runs about 300 to 400 times faster. Now you know why living in the Bay Area’s pace sometimes feels like living in a blender:) This speed is the equivalent to clocks determining the speed of digital chips. The 8088 in 1979 started at 5MHz and we are looking at about 1.2 to 2 GHz for Intel’s Tukwila in 2008.

The third element is power consumption. In 2008 Tukwila’s top end parts consume about 170 Watts, compared to about 1W for the 8088. If you compare this to the number of transistors, the power consumption per transistor has gone down by a factor of 400. If you have looked at your PG&E bill lately, that is quote some energy efficient design.

Bottom line, if they would have been chip design, the design challenges for Slartibartfast have become over the last 30 years a couple of 10,000 times more complex in terms of sheer magnitude if basic elements to deal with, things have become about 400 times faster and designs had to become about 400 times more energy efficient. That’s quite an improvement. In the next part I will look at tools to automate the design and the abstraction levels at which Slartibartfast can enter data into them.

Looks like I almost didn’t get to my yearly review of what happened ten years ago in the technology outlook section of IEEE Spectrum. Well, I could blame it on the fact that apparently the January 2000 section of the technology outlook section did not survive my last garage cleanup. But thanks to digital distribution I could find the appropriate issue to compare where we stand 10 years later.

The Technology Outlook section kicks off in the IEEE Spectrum of January 2000 authored by Linda Geppert and William Sweet with a discussion of the importance of standards. Microsoft was on trial for “proprietary standards”. Billy Joy was interviewed about JAVA, put into the public domain by Sun even though they controlled modifications and extensions to “protect it from the fate of SPICE and Unix”. Leonardo Chiariglione talks about what good has come from proprietary standards even though he also drove MPEG-2 as a standard.

So what was up in EDA? Of course! It was all about standards … The feud between SystemC and SystemVerilog was in full swing. Today, with 20-20 hindsight, we know that Co-Design Automation just elegantly played a MBA text book strategy game – picking a strong opponent to beat up – even though the technical differences between SystemVerilog and SystemC were pretty clear from the beginning. Now we also know that it worked.

Linda’s article kicks off with the three obstacles for IC Designers – lack of a unifying language for hardware and software, verification of design correctness and timing closure.

Focusing on the first here, Co-Design Automation is mentioned to have “ruled out the usefulness of extending an existing language to meet system-on-chip needs”, with candidates for extension having been C, C++, Java, and Verilog. Satisfying the three requirements which they set forth for a new language – unification the design process, improvement of design efficiency and evolution from an existing methodology – SuperLog was conceived. The opponent they had chosen was the SystemC Initiative. Several partners, including Synopsys and CoWare, believed that no new language was needed. They introduced SystemC, a modeling platform that extended the capabilities and advantages of C++ into the hardware domain. The supporters of SystemC came top down so to speak and violating Co-Design’s third rule to be evolutionary. They based their path on the observation that most software developers use C and C++ and many systems developers use C++ already to describe their systems at a behavioral level. But until SystemC it has not been possible to describe hardware using the same language.

So where are we ten years later? No surprise – standards have taken over. And has anybody won? No, both have, in their own way. Co-Design Automation was acquired by Synopsys and SuperLog was put into the standardization process to create SystemVerilog for both verification and design. This was the start of the end of proprietary languages like Verisity’s E. Today SystemVerilog is the clear winning language for evolutionary improving existing hardware design and verification – just as Co-Design Automation had predicted. Has it found an entry into software development? No, it hasn’t.

Equally, on the software side, SystemC has won the battle when it comes to becoming the interconnect fabric for virtual platforms, which enable software development. Standardization played a similarly important role. Synopsys acquired Virtio, put key technologies into OSCI and the TLM-2.0 APIs were born from here as a collaboration within the standards body.

So what is the conclusion 10 years later? Well, three things. First, I have to give it to Steve Leibson and his law that it ‘takes 10 years for any disruptive technology to become pervasive in the design community". It looks like SystemC and SystemVerilog are two good examples of his empirical observation, then formulated as “law”. Second, standardization was and is a key component for technology adoption. And third, business is just business and often trumps technology. Co-Design Automation’s approach ten years ago to pick an opponent to get attention as a small company (even though technically the languages were obviously quite different and for different purposes) was the right business approach and played out beautifully, almost like in MBA text books.

Off to a new decade … It remains interesting!