Archive for the 'Light Technical' Category

All USB Storage products, Flash Drives, Thumb Drives, Hard Drives, and SSDs use a transfer protocol called “Bulk Only Transfer” or “BOT” protocol.  This works reliably in Windows and Linux and other operating systems. 

In USB, a Bulk Transfers refers to a transfer of data that must be 100% accurate when it arrives. No errors can be allowed.  For example, if you are copying pictures from your camera to your computer, you want every color pixel to be 100% accurate.  The same is true for printing a picture.

It also means the data does not need to arrive at a certain time.  If an error occurs in a Bulk transmission, the system retries until the data accurately moves to the destination. 

BOT is highly reliable, but the hard drive companies knew that with USB 3.0 a new method would be needed.  BOT basically sends a single packet at a time.  This works well for USB 2.0.

USB 3.0 lets you send packets along multiple USB 3.0 “streams.”  To take advantage of this, Storage companies created a new USB Driver Class, a purely software feature, to enable faster USB transfers on USB 3.0. called “USB Attached SCSI Protocol” or “UASP.”  UASP allows you to send packets along multiple streams in parallel, and even burst the data faster.

ASUS published a web page that does a fantastic job illustrating how UASP works with an animation sequence. I recommend you click on the image ASUS website below and take a look at it.

I should point out you need a hard drive or SSD that supports UASP inside the hard drive’s firmware to support this.

In the USB community, we’ve actually debated the usefulness of UASP.  In our lab, we performance increases of 6-10% for early applications.

In a test of the ASUS motherboard with a UASP enabled ASMedia Hard Drive, shows a speed bump of about 33-37Megabytes per second going from about 261 to 293 Megabytes per second, or about a 13% increase in speed.

Today, mass market hard drives today won’t deliver data fast enough because they use SATA 3 Gb/s instead of the faster 6Gb/s. Most hard drives bridge from SATA to USB 3.0.  Since USB 3.0 has a maximum effective throughput of about 4Gb/s, this is faster than existing SATA 3/Gb/s drives.  SATA can be limiting.  Within 2 years, this will change because hard drives will have either SATA 6Gb/s support, or native USB 3.0 support so SATA will not be the bottleneck.

Note:
   3 Gigabits/second = 3Gb/s = 300 MB/s = 300 Megabytes/second
   4 Gb/s = 400 MB/s
   6 Gb/s = 600 MB/s

If you are building a USB 3.0 product today, it means you will deploy in about 12-18 months which means you should plan for UASP support or at least investigate UASP for your application.

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I’ve worked on little things like business reviews and integrated product plans the last several weeks.

In the meantime, I’m going to start catagorizing these entries as one of 3 things

1)      Marketing

2)      Technical Light

3)      Technical Heavy

4)      Synopsys Marketing

5)      Tech Life

6)      Rants

Okay, one of 6 things

This way you can decide if you really want to read the entry or not.

Several weeks ago we announced availability of our HSIC and LPM offerings in the PHY, controller, and verification IP fields.

Make no mistake, we actually have a complete, complete offering.

(I hate the word “solution”, it has no meaning since about 1999)

(Maybe before that, but my memory starts in 1999)

This means if you are building a chip with USB that needs these features, you can get 3 elements that you need.

The LPM feature on the PHY allows you to turn the PHY and controller faster on and off faster.  This means you can actually put your devices into a suspend mode more often because you can reliably turn the USB back on quickly when you need power.

This means optimizing the PHY and the controller timing to guarantee the faster on-off times.

The HSIC feature added a high-speed only path to connect to the Synopsys HSIC PHY.  The PHY consists of only the digital portion of the PHY and can be used for chip-to-chip communication on a PCB.  You don’t need 3.3V signaling for HSIC.  So you save power.  You can use standard USB drivers as well.  So if there is a USB device or peripheral chip (and there are lots) you can add an HSIC PHY to it, and make it an on PCB chip.  Similarly you can add a Host to an Apps chip to allow expandability using HSIC Host ports.

For example, in an STB, you could put a standard USB 2.0 EHCI Host on the PCB, run Linux on the board, and run multiple ports from the Host Controller.  Some of the ports could go outside the box, like on a Tivo box for a USB WiFi dongle.  Some of the ports could be used internal to the box on the PCB.  In this case an HSIC PHY would also be integrated into the chip.  HSIC lines would be drawn from the host port on the chip to another peripheral chip, say a SD card reader for reading SD cards plugged into the front of the set top box.   In this way, the HSIC allows use of standard USB Mass Storage, but uses less power and less area because the PHY is smaller (no analog) and the voltages required for HSIC are lower.

Verification IP from Synopsys – As you might guess, we heavily verify all our digital controllers with our Verification IP or VIP.  The VIP has both the LPM and HSIC features added in by this summer.  This is the same VIP that we run through our extensive constrained random verification suite for the controller.  The benefit is that the VIP gets a thorough verification both with the controller and in a stand-alone mode.  It’s actually verified twice completely.

We provide the same, well-verified verification IP for our customers to use.

(I also hate the word “very”.  My feeling is that using this word has even less meaning that the term “solution”)

HSIC High Speed Inter Chip LPM Link Power Management