I can hardly believe it. I’ve been in the EDA business since 1980 when I joined TI’s Design Automation Department after graduating from Cal Poly with my BSEE. Since 1995, much of my attention has been focused on EDA standards. I reached a moment of truth this year when I admitted, albeit reluctantly, that I could be called a standards-lifer. So, I decided it’s time to share my perspectives on what’s going on in the standards arena. Welcome to my blog - I can’t wait to hear from you! The best ever DAC standards booth
Posted by Karen B on July 16th, 2009
Again this year, Synopsys is sponsoring a standards booth at the Design Automation Conference. I bet you think I’m going to say it’s the best ever standards booth. It’s going to be great, for sure, with an impressive line-up of speakers (see below for details) and in-depth information about key industry standards. But I have to say, IMHO, that the best ever DAC standards booth had to have been our first one, back in 1999.
Synopsys has worked hard for more than two decades to bring improved interoperability and standards to the industry. In 1999, we took a very bold step and created a DAC booth dedicated solely to standards and interoperability. We surprised people by not branding it as Synopsys’ booth and by featuring standards that everyone could use (including our competitors). I can’t tell you how excited and scared I was! We played a game named “Interopardy” and sang a song called “My Flow’s in Jeopardy”. It was a blast, and the traffic through the booth far exceeded my expectations.
*** UPDATE: Listen to the song – the lyrics are funny (if you’re an engineer, anyway). Thanks, Harry.***
Here’s Rich Goldman and me – high-fiving after a round of Interopardy. Herb Reiter is in the background.
Rich, Bonnie George, and me – having a ton of fun in the booth:
Rich, Bonnie, the well-loved Ron Waxman, me, and Angela Sutton singing, “My Flow’s in Jeopardy”. Ron was enthralled:
(Photos courtesy of Roy Stahl, inventor of Interopardy and “My Flow’s in Jeopardy”.)
Now – 10 years later – I’m looking forward to our standards booth because of its rich program and the valuable information it will provide. Will I enjoy the standards booth as much as the first time? Come see for yourself. Oh, and don’t forget to visit Conversation Central and vote for me (please) as the Next EDA Top Blogger.
This year’s DAC standards booth will have four stations focusing on standards initiatives that are vital to modern chip design: IEEE 1800 (SystemVerilog), IEEE 1801 (Unified Power Format – UPF), IEEE 1666 (SystemC), and IPL (Interoperable PDK libraries). In the theatre there will be 33 speakers (wow!) presenting on a wide variety of topics. Here’s a sampling:
“Verification Interoperability Best Practices” and “Standards Update” by Accellera
“Importance of Standards in IC Design” by the IEEE Standards Association
“Interoperable PDK Libraries – IPL” by TSMC, by SpringSoft, by Parallel Engines, by Helic, and by Synopsys
“Verification Methodology Manual – VMM” by ARM, by Verilab, and by Doulos
“VMM-Enabled VIP & Verification Planning” by Denali
“Unified Power Format” by ARM, by DOCEA, and by Elastix
“Power-Aware Debug Automation” by SpringSoft
“Troubleshooting TLM2.0 Models” by JEDA
“Fast OVP Processor Models for TLM-2.0-Based Virtual Platforms” by Imperas.
“Reach New Levels of Virtual Prototyping” by CebaTech
“Impact of EDAC on EDA Industry” by EDAC
“Bridging Abstraction Levels Between Transaction and Signal Level” by SDV
“The Truth about Power and Process Technology” by the SOI Consortium
“Automatic generation of SystemC IPs & use cases for Innovator from CoFluent Studio“ by CoFluent
“SystemC Standards Interoperability with CoWare: Get Value from Using–not Building–a Virtual Platform” by CoWare
“Flashing System-Level Power Using PowerOpt” by ChipVision
“IP-XACT and System Level Low Power Design” by IEEE 1685
“GreenSocs Interoperable Modeling Kits Working with Innovator” by GreenSocs
“Design of Heterogeneous Multi-core SoCs using SystemC, Virtual Platforms, and ASIP Design Tools” by Target Compiler Technologies
I hope you enjoy our standards booth!
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It really wasn’t 10 years ago it was just …. hmm, crud that was 10 years ago.
I remember the Escher theme in the background. I remember going to legal to get song lyrics approved, and sitting on the floor at DAC trying to fix the game that the shipper dropped kicked.
But more than anything I remember that we were setting a precedence to go out publicly in a way no one had done before and talk about standards and interoperability on a public stage.
10 years later we are still singing “Interoperty Baby ooooh oooh oooh ooh”
I guess for the 10 year anniversary we need to re-release ‘My Flows in Jeopardy” and digitally remaster it.
Karen,
Try as one might to “not brand it as Synopsys’ booth,” the DAC goblins seemed bent to do just that at the DAC website this year. http://bit.ly/GlEiM (DAC) calls it the “Synopsys, Inc. – Standards Booth.”
Not withstanding the good work you and Synopsys do to promote EDA industry standards (Thank You!), my favorite time was when DAC actually offered standards developing organizations free floor space to promote their standards work, demonstrate collaboration amongst them and foster interoperability much like it happened in 1998: http://bit.ly/sj0vR. Well, OK, thinking about it, there was that time when Synopsys offered a $1000 travel voucher when it sponsored one of the first interoperability booths. Can’t remember the year, but I wonder where the $1K took someone.
See you in a few weeks, baring any more plane delays for you!
-Dennis
Wow, this brings back memories. What a great experience it was to be a part of that. I remember helping to serve as “Vanna White” for the Interoperdy game running the control panel. Thanks for the memories!
Hi Everybody -
I have to temporarily disable comments to this post. Russian spammers are attacking it and Captcha isn’t stopping it. Once our web team figures it out, I’ll enable comments on this post.
Sorry,
Karen