Archive for December, 2008

As the year draws to a close, I want to wish all of you the very best during the holiday season. Let’s hope for a bright 2009.

Take care, everyone -
Karen

Standards and patents are a flammable combination, IMHO.  Let me give you the latest example from my realm.  SystemVerilog, aka IEEE 1800, is an EDA industry standard language for hardware description and verification.  The IEEE P1800 working group is finishing up the next version of the standard, hoping to begin the balloting process in the next couple of months. 

Recently, one of the entity (corporate) members of the P1800 working group made an interesting announcement.  Mentor Graphics said they hold patent claims that are essential for implementing the upcoming version of SystemVerilog.  Even more interesting is that they said they will *not* license these patents. 

If both of these statements are true – and I do not know if they are – the implication is that anyone who implements the upcoming version of SystemVerilog is open to patent infringement claims by Mentor Graphics. 

You can imagine that the P1800 working group participants are contemplating what to do next.  There are many questions coming and decisions to be made.  2009 is sure to start off with intrigue in The Standards Game.  I wish all of my readers a wonderful holiday season.

EDA standards blog The Standards Game
SystemVerilog IEEE 1800 P1800
patents standards essential patents

I’m intrigued by the latest step forward by the IEEE Standards Association: they are jumping into the pool – the patent pool, that is.  Through a collaborative effort with Via Licensing Corporation, the IEEE-SA will cultivate patent cross-licensing.  The goal is to increase adoption of IEEE standards, and technologies that employ the standards, by reducing legal hurdles imposed by patents. 

The concept of a patent pool is two or more companies agree to cross-license their patents that are related to a specific technology.  According to Wikipedia, one of the first patent pools was formed in 1856 which promoted mass production of sewing machines.  Related to a standard, a patent pool is formed of “essential patents” which are those patents that would have to be infringed upon in order to implement the standard. 

While a patent pool doesn’t solve every standard-patent issue, it can mitigate situations where companies desire to retain their patent rights while developing industry standards.  With a patent pool in place for a standard, streamlined processes expedite fair licensing, IP rights are preserved for patent holders, consumers of the standard have reduced risk of lawsuits, and legal barriers to adoption of the standard are significantly lower.

All this assumes that the patent holder is willing to license its patent, of course.  If not, I believe the patent holder should follow the 2nd Commandment for Effective Standards: Do Not Mix Patents and Standards.  There are at least a couple of ongoing legal battles over participation in standards committees by patent holders that lead me to say this.  They are the famous (or infamous) Broadcom/Qualcomm (with both sides claiming victory earlier this month) and Rambus (which could end up in the Supreme Court of the United States), both of which bring to question whether a patent holder can retain its IP rights while participating in the development of a standard which cannot be implemented without necessarily infringing on its patent.  Had patent pools been created in these two cases, perhaps the question would have been answered affirmatively.

EDA standards blog The Standards Game
IEEE IEEE-SA IEEE standards
patents standards essential patents

 

Hello to my readers while I’m participating in the IEEE Standards Association meeting series in Florida (not a hardship since the weather is beautiful here and it’s snowing in Colorado).  In conjunction with the meetings, the IEEE-SA held its annual awards ceremony which was an enjoyable and festive event.  The IEEE-SA bestowed several prestigious awards to individuals and a corporation that have made significant contributions towards standards in the electrical and electronic engineering realm.  This year, the recipient of the corporate award was…

… Mentor Graphics.  (Did you think I was going to say something different?)

The IEEE-SA corporate award is given each year to an entity member of the IEEE-SA for leadership and contributions that promote the IEEE-SA’s mission.  Past recipients are Intel, Motorola, HP, Sony, Lucent – Bell Labs, and IBM.  This year’s citation recognizes Mentor’s “visionary leadership in bringing greater efficiency to the standards development process in the Design Automation Standards Committee [DASC] through the adoption and support of the entity based development model”. 

I’m glad to write about this well-deserved award for Mentor, which I feel was given largely due to the efforts of my counterpart at Mentor.  (If you don’t know who he is and would like me to reveal his identity, just let me know and I’ll ask his permission.  He’s not shy, so I think he’d be amenable.)  His efforts towards reconstructing the DASC and promoting the IEEE-SA corporate standards program are noteworthy. 

In the spirit of industry cooperation towards continuous improvement of EDA standards, I send my congratulations to Mentor Graphics.

EDA standards blog The Standards Game
IEEE IEEE-SA IEEE standards

Accellera, which creates many of the standards in the EDA industry, wants your input on how to improve its Open Verification Library (OVL) standard.

Because functional verification takes the majority of time in the IC design process, new techniques are in demand and in use for reducing this effort.  For instance, an assertion-based verification (ABV) methodology can provide a sizable time savings in the debugging process and improve the quality of IC design verification.  Accellera’s OVL standard is a library of assertion checkers that can be used in simulation, emulation, and formal verification to support an ABV methodology.

The OVL technical subcommittee of Accellera is conducting a survey to learn about potential enhancements users would like and to measure usage of its assertion checkers. 

If you use OVL or an ABV methodology – and even if you don’t – the OVL subcommittee would like to hear from you.  Their survey is open now on their website.

EDA standards blog The Standards Game
Accellera OVL assertion-based verification ABV assertion checkers

Today’s economic climate is challenging to everyone, needless to say. Purchase decisions are scrutinized and budgets are tight for customers and suppliers alike. Now, as always, customers want choices and complete solutions. Interoperability – and suppliers’ programs that promote it – are now as important to customers as ever.

My company continues to be a long-time champion for interoperability. Please indulge me while I brag a little. Recently, a respected industry analyst said that “Synopsys is the king of interoperability” (scroll down to the “S” catagory). I admit that I felt a bit of a glow when I read this.

At Synopsys, we continue to work hard and spend significant resources to provide interoperable products and solutions to our customers. Our flagship interoperability program, in-Sync, allows scores of EDA companies to develop and test interfaces to our key products. Our catalyst programs help institute new and advanced industry standards such as SystemVerilog. Our standards program proactively provides the industry with technology and resources to help bring about much-needed standards via formal committees and open source. Presently, we are members of more than 30 standards organizations, our employees participate in 60+ standards-setting committees, and our products support as many industry standards. And for the most sensitive interoperability challenges (legal situations, for instance), our S.U.R.F. program provides secure facilities for other companies to debug problems with interfaces to our tools.

Why do we keep investing in interoperability programs?  Simple. Our customers require it. While we would certainly enjoy being the sole supplier of EDA solutions on the planet, we recognize the realities of healthy businesses. Working with competitors to allow our customers to make their best choices brings a certain measure of health to our company.

Something I learned very early in my career is that an IC designer’s job is *not* to run CAD tools.  It’s to produce a circuit design. This requires many tools combined in specialized flows, which of course implies interoperability.  Interoperability doesn’t happen by itself, and I’m proud to be part of a company that understands and cares about it. I believe our customers appreciate it.

EDA standards blog The Standards Game
open open standards in-Sync TAP-in SURF Synopsys interoperability EDA standards EDA interoperability