Help me finish this post: EDA Standards History to Date
Posted by Karen B on September 4th, 2008
A year or so ago, I compiled a history of standards in the EDA industry as I had experienced it. I’d like to update it now and thought it would be interesting to get input from you before I completed this year’s edition. Post your comments below or send me email with your thoughts on where our industry stands today with respect to EDA standards and where you think we’ll be in the next few years. No bad words, please.
A History of EDA Standards
The development and adoption of EDA standards began in the early 1980’s. EDIF – the well-known Electronic Design Interchange Format – became the first widely-adopted EDA standard. It allowed netlists and schematics to be transferred among tools from different vendors and with those developed in-house by IC design and semiconductor companies. The CAD Framework Initiative (CFI) was formed to attempt EDA tool interoperability by “encapsulating” tools. Yet, most tool interfaces remained proprietary and closed throughout this decade. Only about 10% of the formats needed to create a design flow were open. EDIF was the premier example of an open EDA standard.
The Age of Emergence: 1990 – 1993
In the early 1990’s, language-based IC design commenced, and two standard languages emerged: Verilog and VHDL. The Verilog language was opened by Cadence after they acquired Gateway Design Automation, the creator of Verilog. VHDL was a U.S. Department of Defense project, originally developed by Intermetrics, IBM, and Texas Instruments. Two industry organizations were formed – OVI (Open Verilog International) and VI (VHDL International) – whose missions were to increase market adoption of their respective standards. The languages were adopted into mainstream design practices. At the same time, new EDA tools were introduced which meant more interfaces by which to connect them, but most of the interfaces were closed. About 30% of the formats needed for tool interoperability were open; the key open formats were Verilog and VHDL.
The Age of Turmoil: 1994 – 1996
In the middle of the 1990 decade, the first public EDA “standards war” broke out. It was VHDL vs. Verilog, and both sides were passionate that their standard was better. (I still have my “VHDL Bigot” T-shirt – not that I took sides, I just liked the shirt.) And the skirmishes were not contained to the VHDL/Verilog battleground. EDA standards organizations had separate, competing booths at the Design Automation Conference. Alain Hanover, who was the CEO of Viewlogic at the time, said, “There are more standards committees than EDA companies!” CFI encapsulation failed to be adopted. An effort was started to produce an EDA standards roadmap that would align everyone with the ITRS (International Technology Roadmap for Semiconductors), but the endeavor struggled to make headway. Customers became increasingly frustrated and tried to take matters into their own hands through a Customer Standards Committee. As more EDA tools were introduced into the marketplace, the overall amount of open formats needed for interoperability dipped to around 25%.
The Age of Enlightenment: 1997 – 1998
The industry became increasingly aware of the cost of EDA tool interoperability. A major customer stated that for every $1 they spent on EDA tools, they had to spend an additional $3-5 on interoperability. An industry analyst estimated that the industry was spending an eye-popping $7-9 billion annually on tool interoperability. The EDA Consortium, the EDA industry’s trade association, instructed its Standards Committee to determine how much the EDA industry paid to standards bodies in annual dues. The answer was more than $850,000! The Standards Committee then attempted to improve the EDA industry’s return on investment in these bodies by gathering all the membership dues and paying them only through the EDA Consortium. In fear, standards bodies resisted, and one even threatened a lawsuit. The CAD Framework Initiative changed its name to Silicon Integration Initiative and limited the number of EDA board members to only 2. While a couple more key formats were opened – PDEF (Physical Design Exchange Format) from Synopsys and DCL (Delay Calculation Language) from IBM – the overall amount of open formats remained at about 25%. It was clear that something had to be done.
The Age of Openness: 1998 – 2001
The EDA industry, with encouragement (and dare I say, threats?) from customers, rose to the challenge of improving interoperability and reducing the cost of doing so. The VHDL/Verilog standards war had burned itself out, resulting in EDA companies supporting both languages and customers choosing the one they preferred. OVI and VI merged into a single body and named the combined organization Accellera. The EDA Consortium’s Standards Committee renamed itself the Interoperability Committee to indicate that interoperability was more than just standards. Synopsys and Cadence launched a daring joint project called Spine99 to identify a backbone of standards that all EDA tools could plug into. While it was never adopted by more than a few EDA companies, it provided a means for the 2 biggest EDA competitors to work together towards interoperability. The revolutionary model of open source standards was introduced. Started by Synopsys with the Liberty (.lib) format, open source became a viable solution for providing fast, needed standards. Key formats that were made available through open source were: .lib (Liberty), SDC, lef/def, SystemC, and OpenVera. The undertakings of this age opened approximately 75% of the needed formats for interoperability.
The Age of Acceleration: 2001 – 2002
After the turn of the century, the EDA industry continued to deliver effective, market-relevant standards with more cooperation and less cost to the industry. Customers voiced their approval and support. That same major customer who spent 3-5 times as much on interoperability as tools said that interoperability costs had dropped from 3-to-1 to 1-to-3. Doing the math indicated that the industry had saved $4.7-6 billion! The Accellera standards-setting organization saw increased participation and received an unprecedented number of technology donations. Standards committees cooperated with each other, and open source standards were in widespread use. Key formats that were opened included: Superlog subsets, OVA (Open Vera Assertions), “C” simulator/test/interface, testbench, Genesis, and Sugar. Superlog, OVA, C s/t/i, and testbench became important components of the future SystemVerilog standard language for design and verification. Genesis, Cadence’s database, eventually became OpenAccess. Sugar from IBM ultimately became PSL (Property Specification Language). Overall, almost 90% of necessary interoperability formats were open.
Not only did customers recognize improved interoperability, but EDA companies began recognizing each others’ contributions. Customers told us: “At least we’re all talking now”, “Liberty allowed us freedom to design in new capabilities”, “SDC Seamless Timing Flow Goal: Remove the burden of learning proprietary tools from the customer”, “OpenVera simplifies modeling/interface to hardware”. The first two Tenzing Norgay Interoperability Achievement Awards went to CoWare and Mentor Graphics. The industry realized there were several paths to successful standardization. A Dataquest/Si2 study showed some positive trends in interoperability. (Too bad the customers didn’t seem to use their extra money to buy more EDA tools. J Unfortunately, this study was never repeated – I’d like to see the trends today.) There was a lot of good news, but still there were key interfaces closed, such as Avanti’s Milkyway and Synopsys’ SAIF (Switching Activity Interchange Format). And troubling was the realization that committee-developed standards took anywhere from 3-6 years until ratification by the IEEE. In the EDA industry, that meant a standard could be obsolete by the time it was finished.
The Age of Interoperability: 2003-2005
The next couple of years saw EDA interoperability become a mainstream activity. Significant improvements were made in the time it took for standards to be created and adopted. The IEEE Corporate Standards Program was introduced to Accellera, and its SystemVerilog standard was transferred to the IEEE for ratification in a little over 1 year – 3-6 times faster than the typical time required in the past. The Corporate Standards Program was a new “one company – one vote” model for the IEEE. It helped prevent vote-stacking and brought corporate resources to bear on standards development. The IEEE was pleasantly surprised that it also sped up the standardization process, as this wasn’t their original goal. The industry leveraged all methods of creating standards including formal committees, open source, and open proprietary licensing. Additional standards were opened and developed such as Milkyway, SAIF, OpenMAST, and Verilog-AMS. Synopsys instituted marketing programs to speed adoption of standards such as its SystemVerilog Catalyst and Milkyway Access programs. Although Cadence’s PDK (Physical Design Kit, of which PCells are the key component) remained closed, customers received real value from EDA interoperability.
The Age of Responsiveness: 2006 – 2007
A couple of years ago, a new mantra arose for effective EDA standards creation. “Open, Fast, Inclusive” was chanted throughout the standards arena (and woe be to those who were not all three). New areas of standardization were entered into such as low-power design, test compression, and coverage. Accellera’s UPF (Unified Power Format) standard set records: 7 companies donated technology, 5 months to complete from start to finish. OpenAccess enabled process design kit (PDK) interoperability via a PCell access tool from CiraNova. The IPL (Interoperable PDK Libraries) industry alliance was established to create and promote interoperable PDK standards.
OK, here’s where you can help finish this post. Where are we now? The Age of what??? in 2008. What Ages will we be in from 2010 on? Help me update this history, and you’ll be a part of it… forever.
EDA standards blog The Standards Game
EDA standards open standards open source
IEEE IEEE-SA IEEE standards
Accellera EDIF Milkyway SAIF Liberty .lib SDC MAST OpenMAST
IPL Interoperable PDK Library pcells
SystemVerilog VHDL Verilog
















I can hardly believe it. I’ve been in the EDA business since 1980 when I joined TI’s Design Automation Department after graduating from Cal Poly with my BSEE. Since 1995, much of my attention has been focused on EDA standards. I reached a moment of truth this year when I admitted, albeit reluctantly, that I could be called a standards-lifer. So, I decided it’s time to share my perspectives on what’s going on in the standards arena. Welcome to my blog - I can’t wait to hear from you! 











The Age of Consolidation?
The Age of Unification?
As you rightly observed in Verilog-VHDL battles, the EDA vendors chose to implement both HDLs and the users chose the one they were most comfortable with. Another aspect you skipped over is the impact of IP (on EDA stds) in its infancy days of the 90s. Many soft IPs (RTL) were available in one HDL or the other, but not both. That partially helped the users with their choice of HDL.
Similar to merger of OVI and VI into Accellera, I expect further consolidation of various “niche” standards bodies. Accellera itself has done well in furthering the standards message and positive impact on the user community by facilitating (expanding? see below) areas beyond (digital) HDL – AMS, verification, test, power, coverage, etc. Accellera also aligned itself closely with the world-recognized standards body of IEEE. However, there are several organizations that are addressing focused areas such as System C by OSCI, and IP delivery and integration by SPIRIT (Gary Delp, help!). I should also mention VSIA which recently disappeared and most of its active efforts moving under IEEE.
IEEE DASC is doing a fabulous job (Thanks Victor Berman!) of coordinating path for many EDA standards to come wetted through outside environments (Accellera, SPIRIT, etc.). It appears to be an excellent symbiotic relationship where focused organizations provide efficiency and IEEE provides thorough, comprehensive process and world-wide reach for these standards. I can envision smaller organizations consolidating into a unified channel to feed “community driven” standards efforts into IEEE.
As you can imagine, any organization that does not make itself useful will disappear! I am sure you know some candidates…
The Age of Expansion?
Here is another way to look at it … along with “fast, open, inclusive”, many of us have also preached “cooperate on standards/formats, compete on implementation/tools.” Your sighting of Verilog, VHDL, UPF, etc. are all good examples of that. More of these “formats” need to come out from being proprietary into open/public. Areas at both ends of the design spectrum are candidates – ESL and DFM. More in Analog, IPs and library areas. Today there are several “in-house” formats for DRC, OPC, CMP, RET, … that true interoperability is not achieved for a company or a design project from concept to production line at Fab and back into testing lab. We need to expand the notion beyond an individual user to the entire design team to the hardware team to the system team and to the overall product team. The scope is much bigger for standardization as the globalization continues to drive different ways we do product development (both internally and external to the local design teams).
Perhaps the Age of Re-birth? Second Avatar?
May be in next installment I will explain this ….
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