This post describes the impact an IP vendor can have on making improvements to the standardization of a serial bus interface due to the influence of low power/low leakage deep sub-micron CMOS process technologies.   

Serial ATA (SATA) is a high-speed serial bus interface used to transfer data from motherboards to peripheral storage devices, such as optical disk drives, HDDs and solid state disk drives. The SATA interface is being integrated into SoCs for consumer electronic products and enterprise class storage systems.  According to IDC, more than 1.1 billion SATA hard drives have shipped from 2001 to 2008. Last year, SATA captured more than 98% of internal hard disk drive shipments, demonstrating that SATA technology is now used in the vast majority of desktop and mobile personal computers.  

So - there is a lot of SATA out there and it makes sense to develop it as IP.  

Due to this demand, the SATA interface is increasingly becoming available as third party intellectual property (IP) in leading edge deep sub-micron CMOS technologies (65/55 nm and 40/45 nm) to help speed development time and lower costs. The quality, completeness and interoperability of this IP become the key considerations to the SoC integrator.   

Interoperability is a key part of the standardization of SATA interface and a program managed by the SATA-IO http://www.serialata.org/, ensures interoperability across SATA products. The interoperability task is becoming complex and is not only a consideration on the system side but also on the IP developer.   

During testing in our Hillsboro, Oregon labs., we discovered two electrical specifications related to wake-up from sleep mode and out of band signaling that did not reflect the current performance of today’s leading edge CMOS technologies. The SATA testing requirements and specifications for partial exit latency for host applications with spread spectrum-enabled only and the burst and gap width tolerances for out of band signals needed to be updated. The bottom-line was that  the speed and on-chip variations of the low power, low leakage deep sub-micron CMOS technologies posed certain challenges to SATA logo certification for these two specifications. The good news was that having completed silicon evaluation of over hundreds of devices, our SATA experts saw no impact on functionality or interoperability. Therefore our proposal, that was successfully received, to the SATA-IO Working Group was to update the the logo testing requirements.    

Together with the SATA IO Working Group, Synopsys helped to resolve these two issues. The specific details are available to SATA-IO members in the latest version of the Universal Test Document (UTD) 1.4.1. 

SATA Disk Drives That Passed Interoperability