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UFS, UniPro and You

Posted by Hezi Saar on September 23rd, 2012

JEDEC UFS (Universal Flash Storage) v1.1 is a standard promoted by JEDEC JC64.1 aiming to replace eMMC for scalable and high performance non-volatile memory interface in mobile and consumer electronics. The same JEDEC JC64.1 is the group that develops eMMC meaning that they see the transition from eMMC to UFS and are prepared to that. It’s fair to assume that UFS will be used in high end mobile applications first like high end smartphones, tablets and Ultrabooks and compete with eMMC on some of the lower end applications. Long term and assuming high volume manufacturing reduces UFS device costs we will see UFS replacing eMMC but there is a long way to go until we reach that time.

Here’s a forecast from iSuppli showing the growth expected in eMMC. You can assume UFS shipment start in 2013 and 2014 in low volume and ramping rapidly starting 2015, which could explain the lower growth expected for eMMC in 2015.

UniPro

MIPI Alliance promoted UniPro (Unified Protocol) as the ultimate implementation of application agnostic layer removing the complexity of link reliability, retransmissions, hand-shaking from the application implementation. On one side the UniPro controller connects to MIPI M-PHY (via standard RMMI interface) that is responsible for the serialization of the data and transmit/receive of the signal to the IC on the other side of the PCB connection. To the SoC side, the UniPro controller offers standard write and read interfaces (through what the spec calls C-Ports) to send/receive data to/from the remote device and configuration interface (called Device management entity – DME) to configure all the UniPro layers such as Transport, Network, Data Link and PHY adaptation. These Write, Read and Control interfaces simplify the connection to different applications and takes care of the complexity associated with high speed data transmission reliability. The first application layer that used today is UFS that uses the UniPro controller to implement the JEDEC UFS v1.1 standard. Other applications using UniPro are MIPI CSI-3 and DSI-2 for next generation image sensors and embedded displays that plan to use MIPI M-PHY and UniPro.

  • You (the designer)

Pressure to meet demand for higher speed, lower power implementations coupled with new standard introductions are difficult to meet. Using these low risk UFS and UniPro controllers with the Synopsys future-proof M-PHY can simplify and help new protocol adoption. Building on these standard IP blocks, You can focus on differentiating features that will help make the product more competitive in the market.

I don’t have a picture of You here but if it’s not too difficult You can look in the mirror. In case you don’t have one handy then look at this funny image about engineers and maybe you’ll find yourself in the picture.

More resources to explore the Synopsys UFS and MIPI IP:

DesignWare® MIPI IP web page

DesignWare® UFS Host Controller IP web page

DesignWare® MIPI UniPro Controller IP web page

DesignWare® MIPI M-PHY IP Web page

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Posted in Application processor, Camera, CSI, Display, DSI, Image signal processor, M-PHY, MIPI alliance, Smartphone, SoC, Storage, Tablet, UFS, Unipro | Comments Off

Office gone Mobile

Posted by Hezi Saar on August 30th, 2012

The world continues to change in front of our eyes. The things that were considered essential a decade ago are now obsolete.
Latest research from Virgin Media Business suggests that Landline phones in offices will be replaced by smartphones. The research says that 65% of the Chief Information Officers interviewed said that the desk telephone is likely to become redundant while the dominance of smartphone grows.
Furthermore, 62% of the CIO’s that were interviewed pointed out that also desktop computers are the next item to disappear from the office.

What will we be doing then? As always technology advancements allow us to increase productivity and have an easier and better access to information. Laptops, Ultrabooks provide a good alternative to desktops with the convenience of portability. Smartphone provide the ability to be reached everywhere.

Here’s a nice picture showing in a funny way how technology changes and makes you wonder about the increasing rate of change:

If you want to read more about this survey, follow this link.


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Posted in Application processor, Baseband processor, Smartphone, SoC, Tablet | Comments Off

The Need for Speed – D-PHY

Posted by Hezi Saar on July 28th, 2012

I cover topics about low power and mobile applications in the past years but there is something that is often neglected. It comes at the expense of lowering the power and it is performance. We can argue that minimizing power consumption is dependent on what kind of power we’re reducing (for example static or leakage vs. dynamic power) and its effect of the performance but we know that there is no void in physics and Higher Voltage threshold for example reduces leakgae but affects max performance.
The problem we have is that as much as we need lower leakage power and lower dynamic power to prolonge the battery life between charges, we also need high performance as we don’t want to wait for an application to load itself or transfer data to our mobile device.
As part of my role I track the operating performance of Image sensors and Displays and one of the good measurements is the maximum bandwidth used by the camera interface CSI-2 and display interface DSI.
I discussed this with David Wolfe (reference my interview with David here) and he provided me some statistics observed as part conducting interoeprability events in the past years.

The first diagram below shows the average speed per lane at each of the past 4 MIPI Display Interop Workshops. It gives us an interesting snapshot of the progress of MIPI DPHY devices, and we see that the speed per lane is steadily increasing.

The second diagram shows the average throughput of each device at the last 4 MIPI Display Interop Workshops. In this case, throughput is simply Mbps per lane times the number of lanes. You can see at the 2012 event throughput took a big jump ahead, largely due to the number of 4 lane devices.

It shows us an interesting trend in the type of demand that exists for MIPI DPHY displays that newer displays use higher bandwidth to achieve higher resolutions.
That’s not a surprise by any mean and we see this in the mobile devices exist in today’s market. What is means is that if you are developing an SoC and target to connect to cameras and displays, you better have flexibility in the maximum number of lanes supported to cover both low and high resolution cameras and displays. In addition you need to select carefully the IP you’re using and for your 28nm SoC design support for the 1.5Gbps possible with the D-PHY v1.1 specification is highly desired. Check out this page for more information about D-PHY capabilities covering performace up to 1.5Gbps/lane.


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Posted in Application processor, Camera, CSI, D-PHY, Display, DSI, Image signal processor, MIPI alliance, Smartphone, SoC | 2 Comments »

CSI-2 and DSI Hardware demo at Mobile Expo 2012

Posted by Hezi Saar on June 27th, 2012


We participated at Mobile Expo as part of the MIPI alliance booth and had hardware demonstration showing our complete and interoperable CSI-2 and DSI host interfaces.

Here’s a block diagram of the demo which shows a complete CSI-2 images sensor interface and DSI display interface that Application processors can use to quickly integrate and prototype this solution in their design.

The block diagram shows a complete CSI-2 interface (comprising of D-PHY optimized for CSI-2 host application and CSI-2 host controller) connecting to a microcontroller that extracts the image and places it in package for trasmission through the DSI interface (comprising of DPHY and DSI host controller).

We continue investing in building complete and interoperable solutions to help semiconductor designers adopt new standards while lowering design risk and meeting time to market challenges. I will share more information about other standards in the coming weeks. Please stay tuned.


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Posted in Application processor, Camera, CSI, D-PHY, Display, DSI, Image signal processor, MIPI alliance, Smartphone, SoC, Tablet | Comments Off

Making the case for LLI

Posted by Hezi Saar on June 21st, 2012


I wanted to make a few points about why you should think of implementing LLI (and M-PHY) in your next design.
But first, I want to invite you to a live webinar conducted by Synopsys and Arteris that will explain the implementation and best practices when implementing LLI.

Now, why should you consider LLI and for what purpose:

The MIPI alliance Low Latency interface (LLI) was released in February 2012. LLI spec defines an efficient and scalable chip-to-chip interface between companion chips to enable use cases such as memory sharing.


Why the need for Low Latency?

In order to allow memory sharing, the link between the ICs should experience small delay times when transferring data to enable access to data in speeds as close as possible to direct DDR connection to the same IC.


Is this use case mature?

Memory sharing is not a brand new concept. In fact, a proprietary interface called C2C is already used by various vendors to enable memory sharing between baseband processor and application processor. Here’s a list of key vendors that use C2C This proves the maturity and widespread of the memory sharing use case: Intel, Texas Instruments, Samsung, LG, ST–Ericsson, HiSilicon Technologies, and Via Telecom. The press release claims to have 10 customers and that was a year ago.
LLI is a standard interface specifying a scalable, lower pin count, reduced EMI interface compared to the proprietary C2C interface. And it is used primary to the same use case as C2C.


Is the specification ready?

The LLI specification was released back in February and M-PHY specification v1.0 was released last year. The M-PHY specification v2.0 was expected in June this year and provides enough maturity to design M-PHY for LLI application. Read more about M-PHY features here.


How do I implement?

Designing LLI is complex and requires a lot of know-how in interface and also in interconnect to make memory sharing possible.
I want to invite you to a live webinar conducted by Synopsys and Arteris that will explain the implementation and best practices when implementing LLI. We will also touch on the solution and encourage you to discuss it with us during the Q&A using another opportunity.
The webinar is on June 27th 9:00AM PST, please register and learn more details on how to use LLI in your next SoC design.


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Posted in Application processor, Baseband processor, LLI, M-PHY, MIPI alliance, Smartphone, SoC, SSIC | Comments Off

Demo at Mobile Expo – Shanghai

Posted by Hezi Saar on June 15th, 2012

 

I’m receiving a lot of questions recently on CSI-2 and DSI usage in the system and continue to see these as the de-facto standards for cameras and displays in mobile electronics and beyond.

 

Synopsys will be participating in the coming Mobile Expo event in Shanghai, that’s next week June 20 to June 22 in Shanghai.

We will be demonstrating our CSI2, DSI and D-PHY prototyping system in the MIPI alliance booth in Hall N1 stand A41.
We will have a team of experts that could answer questions about usage and can discuss how best to implement your system to support a variety of image sensors and displays that are introduced in the market.
If you are located in Shanghai or visiting don’t miss this opportunity!
But if you cannot be there then watch this video here which shows a similar prototyping system configuration.


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Posted in Application processor, Camera, CSI, D-PHY, DSI, Image signal processor, MIPI alliance, Smartphone, SoC, Tablet | Comments Off

Mobile solutions at Work

Posted by Hezi Saar on May 30th, 2012


We typically refer to mobile solutions in the context of consumers as these mobile devices are used in our daily life for fun, accessing information, watching movies and similar tasks. We also use these Mobile electronics for work related tasks: phone calls, texting, email, business apps and for accessing / sending information.

There are more specific mobile solutions which are targeted at a certain business environment such as medical and fleet management. The later is a very interesting market segment that is one of the first vertical markets targeted by mobile vendors. The benefits of using mobile solutions in fleet management are clear. Usage of inexpensive and abundant GPS-based mobile applications can help simplify workforce management, route optimization and dispatch, vehicle diagnostics, eliminating driver paperwork for Hours of Service applications for example.

All of these capabilities help control costs and increase efficiency and directly related to the usage of mobile solutions. Examples: image or barcode captured can increase productivity and reduce paperwork. Wireless time cards allow to remotely clock in and out and simplify these tasks and decrease the paperwork burdon. The ability to track driver location allows to define boundaries and provide an alert to save on fuel costs by minimizing out-of-route miles.

Here’s a photo of Motorola ES400 mobile phone scanning a barcode

What does it have to do with mobile interfaces?

Usage of high speed air-link such as 3G allow to enable data-based services. The ruggedized mobile electronics available, which are in essence smartphones or tablet computers targeted to serve a certain industry provide more opportunities (or more headache) to SoC architects. Having a flexible design that can cover multiple applications and still be cost effective and manufacturable is challenging. This is more difficult as mobile applications go horizontally (all consumers), vertically (automotive, medical, industrial, emergency, military) and in the future expected to fragment further into sub-categories. The opportunity here is to expand the mobile market into applications that could bear higher ASPs and thus higher margins but will pay for a product that can support the right features.
One approach to mitigate this problem is defining the base platforms per similar market(s) and have the flexibility within each platform to add or remove features as needed. For that you need interfaces that can support the variety of options considered on each platform AND provide application optimized approach to maximize the profitability. How you do all that? some of the mobile interfaces supported today (and in the future) allow you to achieve that in an elegant way and I’ll be discussing some of these options in future blog posts.


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Posted in Application processor, Baseband processor, Camera, CSI, D-PHY, DigRF, Display, DSI, LLI, M-PHY, Smartphone, SoC, SSIC, Storage, Tablet, UFS, Unipro | Comments Off

MIPI Interoperability and Conformance: Interview with David Woolf (Part 3)

Posted by Hezi Saar on May 16th, 2012

We are back with part#3 and FINAL of the interview with Mr. David Woolf, Senior Engineer at UNH-IOL, which actively engages in interoperability and conformance tests for various MIPI protocols. If you missed the first part of the interview you can find it here and second part here.


Question: David, what do you think vendors such as Synopsys can do to strengthen the MIPI eco-system?

Answer: Synopsys is in a unique position, having customers in many corners of MIPI, they can have a big influence. I’m happy to see Synopsys engaging early on conformance and interop testing. I think that will lead to smoother integration for its customers later on, which will strengthen the whole MIPI community.


Question: What is your perspective about MIPI protocols enabled by M-PHY and D-PHY and how do you think these could be tested to avoid failures in the field?

Answer: Looking ahead, I hope to see future interfaces like M-PHY and the protocols that ride on top of them like LLI and UniPro, and eventually CSI-3 and DSI-2, tested in the same way we’ve we’re testing D-PHY, CSI-2, and DSI. I know UniPro is off to a good start with a series of interop events. The interop events are a great opportunity not only to prove that an interface works, but to meet your counterparts at other companies. Knowing individuals at other companies and working side by side with them at an interop event contributes to unity within the industry. Of course many of these companies are competitors. But interoperable products lead to a more fruitful marketplace, which is good for all of us.


Question: What are the plans for interoperability in 2012?

We’re hoping to have several MIPI Interop Workshops in 2012. We just had the first ever MIPI BIF Interop Workshop in January, and I anticipate there will be another one this year. We had a MIPI Display Interop Workshop in March, which several application processor and display peripheral companies have already signed up for. There’s a chance we’ll have an LLI Interop Workshop this year too, which could be the first interop workshop with M-PHY silicon.


Question: Can you share with us summary of the results from an upcoming recent interop and conformance event which can illustrate the benefits we discussed here

Answer: There are several benefits to the interop events. One that’s often overlooked is the potential for these events to help improve the specification. Of course each individual company benefits by being able to prove their designs, and make contacts at other companies, and get a third party report showing their interoperabilty. But there is a benefit to the whole MIPI community as well. It’s when doing these interop tests that we may find cases where different companies have interpreted the specification differently. That happened at a recent event where we found an ambiguity in how DSI peripherals may respond to a Bus Turn Around request. We found that in some cases, if a host made a query to a DSI peripheral followed by a Bus Turn Around request, we would get a different response to the query from the peripheral depending on how quickly the Bus Turn Around request was sent after the query. Essentially, if the Bus Turn Around request was sent too quickly, you could get the wrong data back in the response from the DSI peripheral. This was an interoperability problem, but it proved to be an opportunity to improve the DSI specification. UNH-IOL worked with the MIPI Display Working Group to clarify that portion of the DSI specification. That benefitted the entire MIPI community.


Hezi Saar: David, thank you for sharing your perspective on this topic. I believe this interview will be used by many to educate themselves about what they need to take care of when they develop their next MIPI interface.

David: Thank you for the opportunity.


That’s all for now, I hope you enjoyed reading please visit next time and forward if you found this interesting.


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Posted in Application processor, Baseband processor, Camera, CSI, D-PHY, DigRF, Display, DSI, Image signal processor, LLI, M-PHY, MIPI alliance, RFIC, SoC, Tablet, Unipro | Comments Off

MIPI Interoperability and Conformance: Interview with David Woolf (Part 2)

Posted by Hezi Saar on April 26th, 2012

We are back with part#2 of the interview with Mr. David Woolf, Senior Engineer at UNH-IOL, which actively engages in interoperability and conformance tests for various MIPI protocols. If you missed the first part of the interview you can find it here.


Question: David, what could go wrong if a cell phone integrator uses a device that did not pass MIPI protocol interoperability?

Answer: An untested device is an unknown. The goal of interoperability workshops is to be a frontline for finding interoperability problems and erase some of those unknowns. I think that the biggest problems would crop up during ‘in house’ interoperability testing in the labs at the integrator companies. When they come across an interoperability problem they need to double check it, go back to the supplier, ask for a fix, try again. If they are constantly dealing with interoperability problems during integration, that’s going to slow down the validation process.


Question: Please explain why MIPI protocol conformance is important? Can you give an example?

Answer: Although our ultimate goal is interoperability, conformance is the foundation that interoperability is built on. If products ignore key aspects of the specification, we won’t have interoperability. Conformance also is what can provide margin in a design. For example, in the lab a receiver may be able to decode a non-conformant signal correctly. Maybe the amplitude is too low, or there is some other conformance violation. However if that non-conformant signal is sent in a noisy design across a degraded channel, interoperability slips away. So, it is key that both sides of a link are conformant.


Question: Can you comment on the growing Importance of hardware testing? and give an example of costs and what could happen if you don’t do it right.

Answer: Everyone knows that SoC designs are getting more complex, with more interfaces. Statistically, the chances of a bug popping up in the field are increasing, unless we correspondingly ramp up our test efforts. A bug being found by a customer has massive costs not only in re-spinning a design but in damage to the companies reputation. I’ve had several customers come through our lab just a few days or weeks before tape out, eager to find any bugs because of the cost of trying to fix them after tape out. At the same time, I’ve had the pleasure of seeing products come through the lab several times with incremental improvements. When I see that, I know that the testing we’re providing is helping to refine products early on, and ultimately save time.


Question: As you interact with test engineers from leading mobile IC vendors, can you comment on the general care abouts and challenges they face?

Answer: We’ve heard it said that time is money. But there are times lately when I’ve seen that for many companies time is more important than money. More and more people care about speeding up the test time and getting the testing done faster. Delays are costly.
Next, they care about automation and reproducibility. That makes sense, because often companies are trying to reuse IP. Automation that they create for one design will save time when they reuse that IP.


Question: Interesting point, can you elaborate on cases where time is more important than money? Do you mean time to design the IC ?

Answer: Time to validate. Once a design is ready, it needs to be tested thoroughly as possible and as fast as possible. When you think of all of the interfaces that are on a mobile application processor, the matrix of possible tests is massive (supply voltage, temperature, process variation). Because of this, companies are investing in ways to get this testing done faster. That could be by buying designs that are already tested from IP companies, working with 3rd party test labs, and automating testing.


Stay tuned to the next post with more Answers from David.
If you have further questions you can send to both of us using this page and we’ll try to answer within a reasonable time.


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Posted in Application processor, Baseband processor, Camera, Display, Image signal processor, MIPI alliance, Smartphone, SoC, Tablet | Comments Off

MIPI DigRF Integration Tutorial in IP Summit

Posted by Hezi Saar on March 16th, 2012

Integrating new interfaces is complex. M-PHY based-protocols are new and require a lot of effort to get the IP right on the IC and then make sure it can connect to the other side. IP vendors are required to assist with this effort to make transition and adoption easy for the industry and the IC vendor who selects to integrate this kind of interface.

That’s where Synopsys can help in standardizing these new protocols and help in creating a robust eco-system which fosters adoption. Do you want an example?
In the upcoming IP Summit Synopsys will present a design incorporating MIPI DigRFv4 interface and discuss the integration effort associated with the development of a complete baseband to RFIC application that achieved system-level interoperability.

In addition the session introduces new mobile interfaces for highly configurable systems that enable standard connectivity.

If you have 90 min (or more) to dedicate then I believe this will be a good education experience. The session will be on Wednesday, March 28, 3:30 – 5:00 pm.
Here’s a link to event and registration: http://www.synopsys.com/IP/Pages/IPSummit2012.aspx


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Posted in Baseband processor, DigRF, LLI, M-PHY, MIPI alliance, RFIC, Smartphone, Tablet | Comments Off