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Views and Trends in mobile electronics connectivity related to MIPI IP
 I started my career as an R&D engineer for embedded systems, then transitioned into applications engineering and product marketing roles in the semiconductor industry. With my systems knowledge, I have led many IC design wins that have enabled portable applications such as cellular phones, digital cameras and eBooks.
What intrigues me about the mobile electronics market is how rapid technological innovations, economic forces and changing consumer preferences drive market direction. Let’s explore these developments together.
– Hezi Saar
Recent Posts
Posted by Hezi Saar on July 28th, 2012
I cover topics about low power and mobile applications in the past years but there is something that is often neglected. It comes at the expense of lowering the power and it is performance. We can argue that minimizing power consumption is dependent on what kind of power we’re reducing (for example static or leakage vs. dynamic power) and its effect of the performance but we know that there is no void in physics and Higher Voltage threshold for example reduces leakgae but affects max performance.
The problem we have is that as much as we need lower leakage power and lower dynamic power to prolonge the battery life between charges, we also need high performance as we don’t want to wait for an application to load itself or transfer data to our mobile device.
As part of my role I track the operating performance of Image sensors and Displays and one of the good measurements is the maximum bandwidth used by the camera interface CSI-2 and display interface DSI.
I discussed this with David Wolfe (reference my interview with David here) and he provided me some statistics observed as part conducting interoeprability events in the past years.
The first diagram below shows the average speed per lane at each of the past 4 MIPI Display Interop Workshops. It gives us an interesting snapshot of the progress of MIPI DPHY devices, and we see that the speed per lane is steadily increasing.
The second diagram shows the average throughput of each device at the last 4 MIPI Display Interop Workshops. In this case, throughput is simply Mbps per lane times the number of lanes. You can see at the 2012 event throughput took a big jump ahead, largely due to the number of 4 lane devices.
It shows us an interesting trend in the type of demand that exists for MIPI DPHY displays that newer displays use higher bandwidth to achieve higher resolutions.
That’s not a surprise by any mean and we see this in the mobile devices exist in today’s market. What is means is that if you are developing an SoC and target to connect to cameras and displays, you better have flexibility in the maximum number of lanes supported to cover both low and high resolution cameras and displays. In addition you need to select carefully the IP you’re using and for your 28nm SoC design support for the 1.5Gbps possible with the D-PHY v1.1 specification is highly desired. Check out this page for more information about D-PHY capabilities covering performace up to 1.5Gbps/lane.
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Posted in Application processor, Camera, CSI, D-PHY, Display, DSI, Image signal processor, MIPI alliance, Smartphone, SoC | 2 Comments »
Posted by Hezi Saar on June 27th, 2012
We participated at Mobile Expo as part of the MIPI alliance booth and had hardware demonstration showing our complete and interoperable CSI-2 and DSI host interfaces.
Here’s a block diagram of the demo which shows a complete CSI-2 images sensor interface and DSI display interface that Application processors can use to quickly integrate and prototype this solution in their design.
The block diagram shows a complete CSI-2 interface (comprising of D-PHY optimized for CSI-2 host application and CSI-2 host controller) connecting to a microcontroller that extracts the image and places it in package for trasmission through the DSI interface (comprising of DPHY and DSI host controller).
We continue investing in building complete and interoperable solutions to help semiconductor designers adopt new standards while lowering design risk and meeting time to market challenges. I will share more information about other standards in the coming weeks. Please stay tuned.
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Posted in Application processor, Camera, CSI, D-PHY, Display, DSI, Image signal processor, MIPI alliance, Smartphone, SoC, Tablet | No Comments »
Posted by Hezi Saar on June 21st, 2012
I wanted to make a few points about why you should think of implementing LLI (and M-PHY) in your next design.
But first, I want to invite you to a live webinar conducted by Synopsys and Arteris that will explain the implementation and best practices when implementing LLI.
Now, why should you consider LLI and for what purpose:
The MIPI alliance Low Latency interface (LLI) was released in February 2012. LLI spec defines an efficient and scalable chip-to-chip interface between companion chips to enable use cases such as memory sharing.
Why the need for Low Latency?
In order to allow memory sharing, the link between the ICs should experience small delay times when transferring data to enable access to data in speeds as close as possible to direct DDR connection to the same IC.
Is this use case mature?
Memory sharing is not a brand new concept. In fact, a proprietary interface called C2C is already used by various vendors to enable memory sharing between baseband processor and application processor. Here’s a list of key vendors that use C2C This proves the maturity and widespread of the memory sharing use case: Intel, Texas Instruments, Samsung, LG, ST–Ericsson, HiSilicon Technologies, and Via Telecom. The press release claims to have 10 customers and that was a year ago.
LLI is a standard interface specifying a scalable, lower pin count, reduced EMI interface compared to the proprietary C2C interface. And it is used primary to the same use case as C2C.
Is the specification ready?
The LLI specification was released back in February and M-PHY specification v1.0 was released last year. The M-PHY specification v2.0 was expected in June this year and provides enough maturity to design M-PHY for LLI application. Read more about M-PHY features here.
How do I implement?
Designing LLI is complex and requires a lot of know-how in interface and also in interconnect to make memory sharing possible.
I want to invite you to a live webinar conducted by Synopsys and Arteris that will explain the implementation and best practices when implementing LLI. We will also touch on the solution and encourage you to discuss it with us during the Q&A using another opportunity.
The webinar is on June 27th 9:00AM PST, please register and learn more details on how to use LLI in your next SoC design.
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Posted in Application processor, Baseband processor, LLI, M-PHY, MIPI alliance, Smartphone, SoC, SSIC | No Comments »
Posted by Hezi Saar on June 15th, 2012
I’m receiving a lot of questions recently on CSI-2 and DSI usage in the system and continue to see these as the de-facto standards for cameras and displays in mobile electronics and beyond.
We will be demonstrating our CSI2, DSI and D-PHY prototyping system in the MIPI alliance booth in Hall N1 stand A41.
We will have a team of experts that could answer questions about usage and can discuss how best to implement your system to support a variety of image sensors and displays that are introduced in the market.
If you are located in Shanghai or visiting don’t miss this opportunity!
But if you cannot be there then watch this video here which shows a similar prototyping system configuration.
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Posted in Application processor, Camera, CSI, D-PHY, DSI, Image signal processor, MIPI alliance, Smartphone, SoC, Tablet | No Comments »
Posted by Hezi Saar on May 30th, 2012
We typically refer to mobile solutions in the context of consumers as these mobile devices are used in our daily life for fun, accessing information, watching movies and similar tasks. We also use these Mobile electronics for work related tasks: phone calls, texting, email, business apps and for accessing / sending information.
There are more specific mobile solutions which are targeted at a certain business environment such as medical and fleet management. The later is a very interesting market segment that is one of the first vertical markets targeted by mobile vendors. The benefits of using mobile solutions in fleet management are clear. Usage of inexpensive and abundant GPS-based mobile applications can help simplify workforce management, route optimization and dispatch, vehicle diagnostics, eliminating driver paperwork for Hours of Service applications for example.
All of these capabilities help control costs and increase efficiency and directly related to the usage of mobile solutions. Examples: image or barcode captured can increase productivity and reduce paperwork. Wireless time cards allow to remotely clock in and out and simplify these tasks and decrease the paperwork burdon. The ability to track driver location allows to define boundaries and provide an alert to save on fuel costs by minimizing out-of-route miles.
Here’s a photo of Motorola ES400 mobile phone scanning a barcode
What does it have to do with mobile interfaces?
Usage of high speed air-link such as 3G allow to enable data-based services. The ruggedized mobile electronics available, which are in essence smartphones or tablet computers targeted to serve a certain industry provide more opportunities (or more headache) to SoC architects. Having a flexible design that can cover multiple applications and still be cost effective and manufacturable is challenging. This is more difficult as mobile applications go horizontally (all consumers), vertically (automotive, medical, industrial, emergency, military) and in the future expected to fragment further into sub-categories. The opportunity here is to expand the mobile market into applications that could bear higher ASPs and thus higher margins but will pay for a product that can support the right features.
One approach to mitigate this problem is defining the base platforms per similar market(s) and have the flexibility within each platform to add or remove features as needed. For that you need interfaces that can support the variety of options considered on each platform AND provide application optimized approach to maximize the profitability. How you do all that? some of the mobile interfaces supported today (and in the future) allow you to achieve that in an elegant way and I’ll be discussing some of these options in future blog posts.
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Posted in Application processor, Baseband processor, Camera, CSI, D-PHY, DigRF, Display, DSI, LLI, M-PHY, Smartphone, SoC, SSIC, Storage, Tablet, UFS, Unipro | No Comments »
Posted by Hezi Saar on May 16th, 2012
We are back with part#3 and FINAL of the interview with Mr. David Woolf, Senior Engineer at UNH-IOL, which actively engages in interoperability and conformance tests for various MIPI protocols. If you missed the first part of the interview you can find it here and second part here.
Question: David, what do you think vendors such as Synopsys can do to strengthen the MIPI eco-system?
Answer: Synopsys is in a unique position, having customers in many corners of MIPI, they can have a big influence. I’m happy to see Synopsys engaging early on conformance and interop testing. I think that will lead to smoother integration for its customers later on, which will strengthen the whole MIPI community.
Question: What is your perspective about MIPI protocols enabled by M-PHY and D-PHY and how do you think these could be tested to avoid failures in the field?
Answer: Looking ahead, I hope to see future interfaces like M-PHY and the protocols that ride on top of them like LLI and UniPro, and eventually CSI-3 and DSI-2, tested in the same way we’ve we’re testing D-PHY, CSI-2, and DSI. I know UniPro is off to a good start with a series of interop events. The interop events are a great opportunity not only to prove that an interface works, but to meet your counterparts at other companies. Knowing individuals at other companies and working side by side with them at an interop event contributes to unity within the industry. Of course many of these companies are competitors. But interoperable products lead to a more fruitful marketplace, which is good for all of us.
Question: What are the plans for interoperability in 2012?
We’re hoping to have several MIPI Interop Workshops in 2012. We just had the first ever MIPI BIF Interop Workshop in January, and I anticipate there will be another one this year. We had a MIPI Display Interop Workshop in March, which several application processor and display peripheral companies have already signed up for. There’s a chance we’ll have an LLI Interop Workshop this year too, which could be the first interop workshop with M-PHY silicon.
Question: Can you share with us summary of the results from an upcoming recent interop and conformance event which can illustrate the benefits we discussed here
Answer: There are several benefits to the interop events. One that’s often overlooked is the potential for these events to help improve the specification. Of course each individual company benefits by being able to prove their designs, and make contacts at other companies, and get a third party report showing their interoperabilty. But there is a benefit to the whole MIPI community as well. It’s when doing these interop tests that we may find cases where different companies have interpreted the specification differently. That happened at a recent event where we found an ambiguity in how DSI peripherals may respond to a Bus Turn Around request. We found that in some cases, if a host made a query to a DSI peripheral followed by a Bus Turn Around request, we would get a different response to the query from the peripheral depending on how quickly the Bus Turn Around request was sent after the query. Essentially, if the Bus Turn Around request was sent too quickly, you could get the wrong data back in the response from the DSI peripheral. This was an interoperability problem, but it proved to be an opportunity to improve the DSI specification. UNH-IOL worked with the MIPI Display Working Group to clarify that portion of the DSI specification. That benefitted the entire MIPI community.
Hezi Saar: David, thank you for sharing your perspective on this topic. I believe this interview will be used by many to educate themselves about what they need to take care of when they develop their next MIPI interface.
David: Thank you for the opportunity.
That’s all for now, I hope you enjoyed reading please visit next time and forward if you found this interesting.
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Posted in Application processor, Baseband processor, Camera, CSI, D-PHY, DigRF, Display, DSI, Image signal processor, LLI, M-PHY, MIPI alliance, RFIC, SoC, Tablet, Unipro | No Comments »
Posted by Hezi Saar on April 26th, 2012
We are back with part#2 of the interview with Mr. David Woolf, Senior Engineer at UNH-IOL, which actively engages in interoperability and conformance tests for various MIPI protocols. If you missed the first part of the interview you can find it here.
Question: David, what could go wrong if a cell phone integrator uses a device that did not pass MIPI protocol interoperability?
Answer: An untested device is an unknown. The goal of interoperability workshops is to be a frontline for finding interoperability problems and erase some of those unknowns. I think that the biggest problems would crop up during ‘in house’ interoperability testing in the labs at the integrator companies. When they come across an interoperability problem they need to double check it, go back to the supplier, ask for a fix, try again. If they are constantly dealing with interoperability problems during integration, that’s going to slow down the validation process.
Question: Please explain why MIPI protocol conformance is important? Can you give an example?
Answer: Although our ultimate goal is interoperability, conformance is the foundation that interoperability is built on. If products ignore key aspects of the specification, we won’t have interoperability. Conformance also is what can provide margin in a design. For example, in the lab a receiver may be able to decode a non-conformant signal correctly. Maybe the amplitude is too low, or there is some other conformance violation. However if that non-conformant signal is sent in a noisy design across a degraded channel, interoperability slips away. So, it is key that both sides of a link are conformant.
Question: Can you comment on the growing Importance of hardware testing? and give an example of costs and what could happen if you don’t do it right.
Answer: Everyone knows that SoC designs are getting more complex, with more interfaces. Statistically, the chances of a bug popping up in the field are increasing, unless we correspondingly ramp up our test efforts. A bug being found by a customer has massive costs not only in re-spinning a design but in damage to the companies reputation. I’ve had several customers come through our lab just a few days or weeks before tape out, eager to find any bugs because of the cost of trying to fix them after tape out. At the same time, I’ve had the pleasure of seeing products come through the lab several times with incremental improvements. When I see that, I know that the testing we’re providing is helping to refine products early on, and ultimately save time.
Question: As you interact with test engineers from leading mobile IC vendors, can you comment on the general care abouts and challenges they face?
Answer: We’ve heard it said that time is money. But there are times lately when I’ve seen that for many companies time is more important than money. More and more people care about speeding up the test time and getting the testing done faster. Delays are costly.
Next, they care about automation and reproducibility. That makes sense, because often companies are trying to reuse IP. Automation that they create for one design will save time when they reuse that IP.
Question: Interesting point, can you elaborate on cases where time is more important than money? Do you mean time to design the IC ?
Answer: Time to validate. Once a design is ready, it needs to be tested thoroughly as possible and as fast as possible. When you think of all of the interfaces that are on a mobile application processor, the matrix of possible tests is massive (supply voltage, temperature, process variation). Because of this, companies are investing in ways to get this testing done faster. That could be by buying designs that are already tested from IP companies, working with 3rd party test labs, and automating testing.
Stay tuned to the next post with more Answers from David.
If you have further questions you can send to both of us using this page and we’ll try to answer within a reasonable time.
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Posted in Application processor, Baseband processor, Camera, Display, Image signal processor, MIPI alliance, Smartphone, SoC, Tablet | No Comments »
Posted by Hezi Saar on March 16th, 2012
Integrating new interfaces is complex. M-PHY based-protocols are new and require a lot of effort to get the IP right on the IC and then make sure it can connect to the other side. IP vendors are required to assist with this effort to make transition and adoption easy for the industry and the IC vendor who selects to integrate this kind of interface.
That’s where Synopsys can help in standardizing these new protocols and help in creating a robust eco-system which fosters adoption. Do you want an example?
In the upcoming IP Summit Synopsys will present a design incorporating MIPI DigRFv4 interface and discuss the integration effort associated with the development of a complete baseband to RFIC application that achieved system-level interoperability.
In addition the session introduces new mobile interfaces for highly configurable systems that enable standard connectivity.
If you have 90 min (or more) to dedicate then I believe this will be a good education experience. The session will be on Wednesday, March 28, 3:30 – 5:00 pm.
Here’s a link to event and registration: http://www.synopsys.com/IP/Pages/IPSummit2012.aspx
If you like to read this or other previous posts, send this URL to your friends and tell them to Subscribe to this Blog.
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Posted in Baseband processor, DigRF, LLI, M-PHY, MIPI alliance, RFIC, Smartphone, Tablet | No Comments »
Posted by Hezi Saar on March 11th, 2012
I constantly receive questions about MIPI plug-fest and other certification programs through my business engagements as well as other general MIPI questions.
For this reason I wanted to interview the expert, Mr. David Woolf Senior Engineer at UNH-IOL, which actively engages in interoperability and conformance tests for various MIPI protocols. See more information at UNH-IOL web site: www.iol.unh.edu.
This interview will be posted in several parts to keep the interest and make the posts short and not boring. BTW, the MIPI Alliance Face-to-face meeting is this week in Seoul and I’ll keep you posted on interesting demo’s at a later post.
Question: David, can you tell us a little bit about UNH and the MIPI Interoperability and conformance program?
Answer: The University of New Hampshire InterOperability Laboratory (UNH-IOL) was founded in 1988. Since then we’ve done conformance and interoperability testing in dozens of different technologies. We started working with MIPI Alliance in early 2007. The series of MIPI interfaces have been some of the most interesting technologies I’ve worked with. We’re approaching 6 billion mobile phone connections. It’s exciting to be working on a technology that most of the world will be carrying around in their pocket.
Question: What Interoperability and conformance tests are offered by UNH for MIPI protocols?
Answer: Currently we offer D-PHY Transmitter, D-PHY Receiver, D-PHY S-Parameters, CSI-2 Protocol for Transmitters and Receivers, CSI-2 Interop, DSI Protocol for Transmitters and Receivers, DCS Protocol for Transmitters and Receivers, and DSI Interop. Soon we’ll be offering M-PHY, LLI, and BIF services.
Question: What are the differences between UNH MIPI Interoperability and conformance programs to USB certification or PCIe plugfest based on your understanding?
Answer: USB-IF and PCI-SIG have put together very rigid conformance and interop programs. Products are required to go through that program in order to use the USB or PCI logo in marketing their products. That’s probably necessary to maintain a level of quality in the marketplace, because most products going through those programs are headed directly into the hands of consumers. At the end of the day though, consumers don’t care about S-parameters or skew. All of the work that goes into testing get’s boiled down to a logo, that the consumer should be able to trust.
However, MIPI is different. The products we’re testing are components of mobile phones. Before getting to the consumer they’ll be integrated into handset designs by experienced engineers. Those engineers are interested in learning more about those components than a single logo can tell them. The engineers want to know how well they work. They want to know things like: What kind of margin will they have? Will they operate well at different temperatures? That’s why our reports typically include plots, measurements, and detailed explanations of the components characteristics and what optional features are implemented.
Question: Why MIPI protocol Interoperability is important?
Answer: Ultimately, Interoperability is what we care about. Products need to work together. In MIPI, things get complicated because of the sheer volume of options that products may implement. Different numbers of lanes, different image resolutions, different data rates, different clocking. Making sure that each of these things is implemented properly, and defined properly is important to MIPI interoperability.
Stay tuned to the next post with more Answers from David.
If you have further questions you can send to both of us using this page and we’ll try to answer within a reasonable time.
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Posted in Application processor, Baseband processor, Camera, CSI, D-PHY, DigRF, Display, DSI, Image signal processor, LLI, M-PHY, MIPI alliance, RFFE, RFIC, SLIMbus, SSIC, UFS, Unipro | No Comments »
Posted by Hezi Saar on March 1st, 2012
It’s probably one of the most important milestones for the MIPI alliance in my humble opinion. Having made inroads into mobile markets with several specifications, camera CSI-2, display DSI, DigRF and D-PHY to name a few, now it’s the turn of the M-PHY. The most scalable, low power physical layer that can serve multiple end-applications (or protocols). Six end-applications to be precise, yes SIX.
You may ask, but the M-PHY specification (v1.0) was released several months ago, so why are we discussing this now?
The question is not just M-PHY specification (v1.0 or future ones) but to have enough momentum from the end-application side to drive demand for the M-PHY. DigRFv4 protocol was driving initial M-PHY adoption for Gear1 functionality (see video of silicon proven M-PHY Gear1 operation ). Last year JEDEC UFS spec was released in March 2011 and this week MIPI Alliance announced the availability of MIPI Low Latency Interface (LLI) specification.
Synopsys announced its 28nm Multigear M-PHY, first to be used for future-proof the design for protocol enhancement leveraging the scalability of the M-PHY enabling IP reuse. Synopsys also announced a joint LLI solution, by providing the M-PHY and Arteris provides its LLI controller to form pre-verified solution and reduce risk of integration. LLI is complex (I’ll touch on this in a later post) and you need to partner with IP companies that can help you cross the raging waters.
Last, I’m in Barcelona Mobile World Congress this week and want to share with you a video of Nokia’s PureView 808 smartphone which has 41 MegaPixel camera capability (Yes, Fourty One Mega Pixel). The short video shows a picture that was taken and how you can zoom to check out small details like a snow flake in your hair.
With data rates increasing dramatically you’ll need to store (or playback) the image taken rapidly, you’ll need to send the image wirelessly. All of these require high speed and low power interfaces to enable this high performance communication and JEDEC UFS (based on MIPI Unipro, MIPI M-PHY) and MIPI LLI (based on MIPI M-PHY) can help Mobile device manufacturers achieve that.
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Posted in Application processor, Baseband processor, Camera, CSI, DigRF, Display, DSI, Image signal processor, LLI, M-PHY, MIPI alliance, RFIC, Smartphone, SoC, SSIC, Storage, Tablet, UFS, Unipro | No Comments »
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