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UFS in Volume Production

Posted by Hezi Saar on January 21st, 2016

JEDEC UFS is an Accredited Standard, developed and adopted through an open consensus process, under the guidelines of JEDEC.
The power of having a standard is that the industry has recognized a useful way to implement things both technically and economically, and through the procedure governed by the standard body (JEDEC for example) enable vendors to develop standard-compliant products and encourage a robust, interoperable eco-system. Standards reduce time to market benefiting the industry and end consumers as technical needs are met and cost goes down with increased maturity.

UFS is gaining momentum with more Storage devices (SK-Hynix, Samsung, and more) and Application Processors (Qualcomm, and more) being rolled out with UFS support. We can find UFS adopted in Mobile Electronic devices which reflects value to the end user through improved customer experience better storage performance, reduced total system power, reduce total system cost. As more vendors develop and rollout UFS products the industry has a variety of processors and devices to select with differentiating features, higher overall volumes and cost reduction. Read the Success Story about Synopsys IP used in SK-Hynix UFS v2.0 device available in Production as an evidence to market adoption trend.
skhynix_mobilestorage_ss

Here’s a video from Samsung explaining the differences between the most common standards used today in mobile storage interfaces:

The clear advantages and growing market adoption of UFS translate to a steady transition of electronics using existing mobile storage standard (eMMC) to the newer more efficient UFS. As usually with standards, transition does not happen overnight. eMMC is well entrenched and it’s sometimes easier for developers to upgrade to higher eMMC speed.
As always, there will be custom solutions out there, for various reasons including value chain optimization, but this is not the norm (this is not standard right?).
The road is clear for UFS to take the lead in servicing the mobile storage market, starting in the high end smartphones and getting into mainstream electronics in the near future.

If you want to see more evidence of eco-system maturity, Synopsys had several demo’s in the last few years to show a complete UFS solution and drive market adoption, here’s a video with hardware demonstrating a complete UFS solution:

Want to learn more about the differences between standards and specifications?
Here’s a link to a good resource explaining the differences. Custom solutions are not covered or discussed, these are not standards.



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Posted in Application processor, M-PHY, MIPI alliance, Smartphone, SoC, Storage, Tablet, UFS, Unipro | No Comments »

Being First to Market – Proven D-PHY v1.2

Posted by Hezi Saar on January 14th, 2016

In my last post I was discussing how to reduce display data transmission using Display Compression technology.
Reducing transmitted traffic while supporting a higher link rate allows to reduce pin count, power consumption and area (cost) of implementation.
In the Oct’15 MIPI Face-to-face meeting we (Synopsys) showed the Industry’s first DPHY v1.2 operating at 2.5Gbps/lane with 16nm silicon running at 2.5Gbps. We used a setup that had two D-PHY testchip boards, one D-PHY acting as Rx and another D-PHY acting as Tx connecting to test equipment to provide stimulus and capture the results.

The diagram below shows how D-PHY v1.2 speeds of 2.5G can be utilized to send all transmitted information over a single data lane, with DSC compression:
Reducing number of pins with D-PHY v1.2
The combination of compression and high bandwidth for displays, higher pixel rate for image sensors is driving the wide adoption of D-PHY v1.2 across the industry, improving system flexibility and deploying cost effective implementations. The MIPI D-PHY continuous to be the physical interface of choice for camera and display interfaces in mobile and beyond-mobile applications and its progression towards faster speeds, longer channel lengths strengthens the eco-system and its dominant market position.

In case you missed the MIPI event in Oct, here’s a quick video we took showing the setup:

Yes, Synopsys is first to market with a proven D-PHY v1.2 solution and competitors will follow which will strengthen the eco-system and allow more options. Being first doesn’t only mean that we can service the first adopters which is obviously true. It also means the ability to service (and most likely having) more customers, more maturity in design and in production. At the end of the day, IP vendors service the eco-system in enabling customers adopt a technology, making it a lower risk investment and helping customers get to market faster.



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Posted in Application processor, Camera, CSI, D-PHY, Display, DSI, Image signal processor, SoC | No Comments »

Cost-effective Display interface implementation

Posted by Hezi Saar on October 26th, 2015


Does your SoC Display interface implementation looks like this?
Dual DSI without DSC


Do you want it to look more like this?
Save Power Area Cost with DSC

then you need to consider adding VESA DSC Encoder to your SoC.

I’ll be presenting a paper on Thursday Oct 29, at MIPI Alliance meeting in Taipei that explains the DSC Benefits.
I’ll be discussing how DSC enables to use the SoC with CoG display driver, and to reduce pin count with DPHY v1.2 at 2.5Gbps.
All these implementations are being designed today to provide better specifications, cost, power to future mobile and mobile-influenced devices.
Synopsys will also show cool hardware demo’s including Industry’s first DPHY v1.2 operating at 2.5Gbps/lane.

Hope to see you on Thursday at Grand Hyatt in Taipei.

#0000FF
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Posted in Application processor, D-PHY, Display, DSI, MIPI alliance, Tablet | Comments Off

Learn from MIPI and Mobile Storage Experts

Posted by Hezi Saar on October 15th, 2015


We live in a challenging era where a lot of information is presented to us and it is hard distill what’s important and where to invest our time.

As a designer, you have a unique opportunity to learn the latest advancements in mobile and mobile-influenced markets, the newest MIPI and Mobile Storage technologies used, how and why from experts from MIPI Alliance, UNH-IOL, UFSA, Synopsys, Keysight and Protocol Insight. There are three MegaTour public seminars scheduled in HsinChu (Taiwan), Shenzhen and Shanghai (China) where you can get very valuable information and have a chance to ask questions and see some cool hardware demos.

In the Synopsys session we will be discussing trends and uses of display, camera and storage in SoC designs.
Mobile SoC

We will cover the latest display topologies used in various applications, how a smart implementation can help there. We will also discuss use of multiple image sensors in typical applications, where various lane configurations, speeds are needed. We will also talk extensively about Mobile Storage and latest features in UFS and eMMC that help support higher throughput which is increasing as more multimedia content and data are being generated in the device.

At the end you’ll have the chance to speak with the experts defining, designing and testing these standards and see a live hardware demos such as these CSI-2 and UFS IP Prototyping Kits.


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Posted in Application processor, Camera, CSI, D-PHY, Display, DSI, Image signal processor, M-PHY, MIPI alliance, Smartphone, SoC, Storage, Tablet, UFS, Unipro | Comments Off

Choosing the Right interface for your SoC

Posted by Hezi Saar on September 29th, 2015

I am often asked when meeting with customers about latest trends and what would be the right interface for the customer next design.
The answer of course depends on which market you go after, your cost targets and more, however being aware of the latest trends help in the decision.

The article describing trends in display and storage interfaces covers the latest developments in Display and Storage interfaces.

In display, we are seeing trend in adding VESA DSC Encoder connecting to DSI protocol and D-PHY, to the SoC side to help reduce transmission rates, cost and power.

VESA DSC is implemented in a typical MIPI DSI display solution

VESA DSC is implemented in a typical MIPI DSI display solution

In storage, we are seeing higher adoption for JEDEC UFS 2.0 standard both in SoC and Storage ICs.

Active and standby power savings comparisons are drawn between eMMC and UFS storage technologies (Source: Universal Flash Storage Association)

Active and standby power savings comparisons are drawn between eMMC and UFS storage technologies (Source: Universal Flash Storage Association)

I’m planning to be in MIPI Face-to-face meeting in October in Taipei, present a paper, show several hardware demos as part of Synopsys presence in the event and driving specifications / definition. I hope to see you there and discuss the needs in your next design.


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Posted in Application processor, D-PHY, Display, DSI, MIPI alliance, Smartphone, SoC, Storage, UFS, Unipro | Comments Off

UFS and CSI-2 Accelerated Design

Posted by Hezi Saar on November 19th, 2014

With the rumors about UFS going mainstream with first introduction in Samsung Galaxy S6 phone expected next year (2015), I wanted to raise what I see as a repeat concern when discussing adoption of new standard (such as UFS).
A key challenge in today’s mobile IC and electronics design is the ability to meet time to market window, get your system up and running with new standards and interoperate with other devices. This is particularly true for JEDEC UFS v2.0 which is fairly new standard that the indusrty is gearing up to mass production of the first UFS devices and Application Processors targeted to be available in the hands of customers in 2015.

Availability of a mature, low risk IP from a reputable company is critical to achieve these goals. I met with too many customers that chose an IP that is claimed to be available or lower-cost to realize at the end that they have no product to go to market with. A big part of the IP selection critera is having a prototyping system that puts hardware and software together and provides a complete system.

You can see our UFS complete solution demonstration here:

JEDEC UFS and MIPI CSI-2 are very good examples to such a system that provides a complete vertical solution to customers developing Mobile ICs. Having MIPI CSI2 and UFS IP prototyping kits enable customers to have an immediate access to proven solution that can easily connect to other external devices and serve as out-of-the-box reference design.

Here’s a video showing USB3.0 IP Prototyping kit, so that you get the idea:

With availability of a variety of proven protcols (USB 3.0, SSIC, PCI Express 2.0, PCI Express 3.0, DDR3, LPDDR3, LPDDR2, MIPI CSI-2, HDMI 2.0, and JEDEC UFS) I see many benefits to the industry by allowing vendors to explore new concepts before their IC design starts, enabling rapid connectivity and starting the hardware design at a later stage. IP Prototyping kits can also help in interoperability tests, in software development while the hardware is being worked on (designed, fabricated, characterized) so more things can be done in parallel and achive the increasing time to market pressures.

Come and get you IP Prototyping kit, read more here.


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Posted in Application processor, Camera, CSI, D-PHY, Display, DSI, Image signal processor, M-PHY, MIPI alliance, Smartphone, SoC, Storage, Tablet, UFS, Unipro | Comments Off

Demand your M-PHY

Posted by Hezi Saar on January 27th, 2014

MIPI Alliance’s M-PHY specification v3.0 provides a solid specification targeted to a variety of applications in the mobile electronics space. I hear some concerns about that this technology is new and engineers prefer to wait for the adoption to pick up before they use it.

Well, it is true that MPHY v3.0 specification is about 1 year old, however note that the M-PHY v1.0 specification was introduced about 3 years ago and was first adopted in DigRFv4 applications. There are several IC’s using M-PHY in production, here’s an example of a Fujitsu Baseband processor. The foundation of the circuitry for higher gears and features introduced in MPHY v3.0 were already established and used several years ago. Furthermore, MPHY v3.0 spec is used by several protocols including those defined by the MIPI alliance work groups (such as UniPro, CSI-3, LLI, DSI-2) and those adopted by other standard bodies which selected the MIPI M-PHY as the physical layer for these applications.
The standard bodies that adopted M-PHY are an industry recognized and established organizations such as USB-IF (promoting USB3.0 SSIC over M-PHY), PCI-SIG (promoting MPCIe over M-PHY) and last but not least JEDEC (promotion UFS over M-PHY).

I sometime get asked about my prediction about M-PHY adoption.
I recently read an interesting article about time travelers. It would have been nice to be able to time travel and accurately predict technology trends (not to say buy a winning lottery ticket), however since I don’t have that talent (yet) I have to rely on my knowledge and thoughts.
I don’t have a crystal ball. However, I am certain that M-PHY v3.0 presents an inflection point in the mobile market which strives for low power, scalable physical layer to build highly optimized architectures in the mobile electronics market.

There is a lot to do in order to build M-PHY as a winner. At this time we have to rely on our judgment and what we know as facts. You can educate yourself more about the M-PHY technology by reading the technical whitepaper recently published. It is a very good read and covers the major topics M-PHY technology is trying to solve.
You can also access the On-Demand recorded webinar at Reducing Power Consumption in Mobile Applications with High-Speed Gear3 MIPI M-PHY IP.

Last, I would love to meet with you and discuss further. I plan to be in Mobile World Congress 2014 in February, feel free to send me an email or leave me a message/comment below and we can arrange something.


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Posted in Application processor, Baseband processor, Camera, DigRF, Display, DSI, LLI, M-PHY, MIPI alliance, Mobile PCIe, Smartphone, SoC, SSIC, Storage, Tablet, UFS, Unipro | Comments Off

Demonstrating M-PHY v3.0 Silicon

Posted by Hezi Saar on June 7th, 2013

MIPI M-PHY is a promising technology, intended to be used across multiple applications and utilized by standard organizations such as JEDEC for UFS, USB for SSIC, and PCI-SIG for Mobile PCIe. We have been working in the past several months to develop and prove M-PHY in HS-Gear3 operation as the specification evolves in the MIPI PHY Work group. Our deep involvement in the group allowed us to develop the M-PHY which is fully compliant to the latest M-PHY v3.0 specification. In March 2013 during the MIPI Face-to-face meeting we demonstrated M-PHY operation in HS-Gear3 and showed it to everyone on the floor. I received a lot of requests to share the video of this demo and now it is ready.

Here are some measurements taken live using the Tektronix equipment connected to the Synopsys M-PHY.

And here you can see the video and the measurements taken at the Transmitter and using loopback mode.

We will be at the next MIPI F2F meeting in Warsaw if you have further questions for me or the MIPI team.


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Posted in Application processor, Baseband processor, CSI, DigRF, LLI, M-PHY, MIPI alliance, Mobile PCIe, Smartphone, SoC, SSIC, Storage, Tablet, UFS, Unipro | Comments Off

Meeting power, performance and reusability requirements for mobile systems

Posted by Hezi Saar on April 16th, 2013

Discussing and sharing opinions is what drives our industry forward; however sharing ideas becomes more challenging in our time where competition is intense. This is true for any industry but even more relevant to the high-pace mobile market where wrong move can cost you a fortune. It is that important then to stay connected and aligned with market trends so you’re not caught off guard and mitigate design and market risks while enabling to take a leadership position.

I’ll be at the Linley Mobile conference which starts tomorrow (April 17 2013) and will be speaking on Thursday April 18th, during the Power-Optimized Design session which starts at 2:35pm, about meeting power, performance and reusability requirements for mobile systems. I will specifically address the growing needs in high performance and mobile-friendly interfaces for chip-to-chip communication such as USB3.0 SSIC and Mobile PCI Express.

These interfaces address the growing needs in higher data throughput transmitted between devices and allow the re-use of existing infrastructure while delivering mobile-friendly solution.

It’ll be good to see you, share ideas about your next design needs and discuss alternative paths.


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Posted in Application processor, CSI, D-PHY, Display, DSI, LLI, M-PHY, MIPI alliance, Mobile PCIe, Smartphone, SoC, SSIC, Storage, Tablet, UFS, Unipro | Comments Off

Shifting to High Speed Gear 3

Posted by Hezi Saar on March 15th, 2013

The MIPI alliance announced the release of M-PHY v3.0 in Barcelona which solidifies the Gear3 and other specs enhancements. From the press release I can quote this:
M-PHY® v3.0 delivers a low-power, scalable physical layer with a data rate range nearing 6Gbps. CSI-3 has been adopted and is available for MIPI Alliance members. LLI v2.0 and M-PHY® v3.0 are scheduled for adoption by the end of April 2013.

Synopsys launched the Industry’s first Multi-Gear M-PHY supporting Gear1, Gear2, and Gear3 which makes it future proof for new protocols back in February 2012. And in the meantime we are contributing to the M-PHY v3.0 specification as we were driving previous specifications.

Next week during the MIPI F2F meeting in Asia (demo day on March 19th), Synopsys will be demonstrating the First silicon proven M-PHY operating at High Speed Gear3 and connecting to Tektronix test equipment.

This demo shows Synopsys true leadership in driving the M-PHY v3.0 specification in the MIPI alliance PHY Work Group in parallel to IP development which allows us to be first to market and first to silicon at the time of final specification.

As M-PHY becomes a popular physical layer for many applications, we continue to see applications adjacent to mobile that would like to use it. I can quote another piece from the press release:
In addition to supporting smartphones and full-function phones, these MIPI specifications are suitable for other applications that require low power, high bandwidth – including tablets/netbooks, consumer electronics, high speed memory storage, automotive and portable medical devices.

See you next week in MIPI F2F meeting, and come see our Gear3 M-PHY demo.


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Posted in Application processor, Baseband processor, Camera, CSI, DigRF, Display, DSI, LLI, M-PHY, MIPI alliance, Mobile PCIe, Smartphone, SoC, SSIC, Storage, Tablet, UFS, Unipro | Comments Off