Archive for April, 2009

Designs today are complicated. Very complicated. From video codecs to PCI Express to set top boxes, we are dealing with extremely complex protocols and algorithms. The design and verification – especially the verification – of these systems are growing so complex that we have to question whether RTL is the right abstraction for this work.

I am currently working on an extensive write-up -someday to become a book – about this challenge. The first part focuses on how to measure complexity in design, and how to minimize it, within the constraints of the current synthesizable subset. The second part will focus on attempts to raise abstraction above the RTL level, and the successes and failures of attempts to do so.

Over then next few weeks, I will be posting parts of this write-up, one chapter at a time. The working title is: The Art of Good Design: Managing complexity in Billion Gate Chips. I welcome your comments and criticisms!

Chapter 1: Introduction (contains the requisite nod to Moore’s law and some basic concepts. The real action starts with chapter 2, to be posted in about 10 days.