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Express Yourself
  • About

    This blog is all about PCI Express: the wonderful ways that it enhances the products around you, the challenges designers face in implementation, and how the specification is evolving to make PCIe Express an even more useful protocol. I'll also examine how the other specifications, such as NVM Express, SATA Express and SCSI-Over-PCI Express (SOP) are leveraging PCI Express. If there is a topic that is of interest to you, feel free to "Express Yourself" by offering your insights on this blog.
  • About the Author

    Scott Knowlton

    I started out my career as a chip designer in a variety of industries and it’s likely that a few, of the more than 30 designs I’ve been responsible for, are still floating around somewhere in outer space. My IP career started at Synopsys in 1997 and over the last 15 years, I have seen tremendous changes in the semiconductor industry’s perception and adoption of IP. I started working on PCI Express in 2003 when Synopsys was getting ready to launch our first PCI Express IP solution. Since then, I have been managing the DesignWare PCI Express IP product line through all of the changes in the specification and the industry as it moves towards becoming the de-facto interconnect standard. I received a B.S.E.E from the University of Michigan (M Go Blue!), am an avid red wine drinker (love California reds) and use English as a second language when my fluency in sarcasm just doesn’t get the job done.

    Richard Solomon

    I’ve been involved in the development of PCI chips dating back to the NCR 53C810 and pre-1.0 versions of the PCI spec so have definitely lived the evolution of PCI Express and PCI since the very beginning! Over the years I have worked on variations of PCI, eventually moving on to architecting and leading the development of the PCI Express and PCI-X interface cores used in LSI’s line of storage RAID controller chips. For the last ten plus years I've also had the honor of serving on the PCI-SIG Board of Directors and holding a variety of officer positions. I am still involved in PCI-SIG workgroups and I present at many PCI-SIG events around the world. Back before the dawn of PCI, I received my B.S.E.E. from Rice University, and hold over two dozen U.S. Patents, many of which relate to PCI technology.

Got Compliance?

Posted by Scott Knowlton on June 18th, 2013

For each new generation of PCI Express, it takes time for the final version of the specification to be available. For PCIe 3.0, the protocol was changed to double the effective bandwidth over the previous version (Gen2) even though the rate only increased from 5.0 GT/s to 8.0 GT/s. This protocol change plus the addition of the equalization protocol to support the new Decision Feedback Equalization (DFE) made the transition to PCIe 3.0 much more complex and consequently extended out the availability of the final 3.0 specification. Of course, this also had an impact on the arrival of products in the market.

While the specification was under development, PCI-SIG members were working in parallel to update the testing procedures to ensure that PCIe 3.0 interfaces from many companies can interoperate with one another to enable the successful launch and adoption of the new version. During the development of the new Gen3 tests, PCI-SIG was holding “For Your Information” (FYI) Workshops that enabled early adopters, such as Synopsys, to come in and test with one another. This helped debug the tests and provided early feedback to the members on how their products are doing. Once the tests were finalized, PCI-SIG moved these FYI tests to full formal test suites, and opened the Compliance Workshops for official 3.0 Compliance Testing. Now, if a PCIe 3.0 product successfully passes, they can be listed on PCI-SIG’s Integrator’s List.

For an add-in card to pass the compliance tests and get on the Integrator’s list, the product has to pass all of the following:

  • The “Gold Tests”
    • Physical layer tests
      • Electrical, i.e., signal quality, jitter, eye testing with scope and PCI-SIG tools
    • Configuration space
      • Verify required fields and values with the PCIeCV software tool
    • Link & transaction layer
      • Exercise protocol boundary conditions and inject errors and check error handling with the Protocol Test Card (PTC)
  • Interoperate with at least 80% of the systems available to test with while at the workshop

We have all seen enough interoperability issues through the years to know we have do interop testing. Different designers interpret the specification differently and/or the specification might not be clear enough. Synopsys spends considerable effort working within and helping to develop the PCI Express ecosystem to make sure that we test out our PCIe controllers and PHY IP with different vendors test equipment, early silicon from major players in the industry, PCI-SIG Compliance Testing and at times other IP vendors.

Early interoperability testing at the PCI-SIG Compliance Workshops with many PCIe products is one of the keys to our success as an IP Provider. The solution we bring to Compliance Workshops is deliberately chosen to allow the greatest number of systems to test with it. This means using a x1 configuration as every single system with slots can accommodate a x1 card.  From helping develop the tests, we also know that there is very little to be gained by testing wider link widths, despite what some folks might claim.  

For PCI Express 3.0, PCI-SIG had the first official Compliance testing in April and the first PCIe 3.0 Integrator’s list went live on May 17th. Synopsys’ DesignWare PCIe 3.0 controller and Gen3 PHY passed the PCI Express 3.0 compliance testing at the first compliance workshop and are listed on the first PCIe 3.0 Integrator’s list.

Take a look at the Synopsys press release announcing our listing on the Integrator’s List.

You can review the list here to see which companies that have passed compliance.

Eric Esteve did a nice blog entry on semiwiki about compliance testing.

Synopsys does Interoperability testing with multiple versions of our PCIe PHYs and controllers in order to maintain quality over multiple releases of our products. If your IP vendor claims they have passed compliance because one of their customers passed compliance testing how do you know if the version you’re using will interoperate over multiple products, pass PCI-SIG compliance testing or if the IP vendor will even know how to do their own testing? As a customer, you shouldn’t accept the argument from your IP vendor that having another customer passing compliance is the same as the IP vendor doing their own testing. As a customer, why would you chose an IP vendor that doesn’t put the effort into interoperability testing, passing the PCI-SIG Compliance workshops and getting on the Integrator’s List?

Years providing PCI Express IP over multiple technologies, multiple configurations, multiple generations and over 750 designs has taught Synopsys that one customer passing Compliance Testing is just NOT the same as doing the testing yourself. This is one of the reasons Synopsys has been the leader in PCI Express IP for over six years (Gartner 2012). Why would you accept anything less?

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