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Express Yourself
  • About

    This blog is all about PCI Express: the wonderful ways that it enhances the products around you, the challenges designers face in implementation, and how the specification is evolving to make PCIe Express an even more useful protocol. I'll also examine how the other specifications, such as NVM Express, SATA Express and SCSI-Over-PCI Express (SOP) are leveraging PCI Express. If there is a topic that is of interest to you, feel free to "Express Yourself" by offering your insights on this blog.
  • About the Author

    Scott Knowlton

    I started out my career as a chip designer in a variety of industries and it’s likely that a few, of the more than 30 designs I’ve been responsible for, are still floating around somewhere in outer space. My IP career started at Synopsys in 1997 and over the last 15 years, I have seen tremendous changes in the semiconductor industry’s perception and adoption of IP. I started working on PCI Express in 2003 when Synopsys was getting ready to launch our first PCI Express IP solution. Since then, I have been managing the DesignWare PCI Express IP product line through all of the changes in the specification and the industry as it moves towards becoming the de-facto interconnect standard. I received a B.S.E.E from the University of Michigan (M Go Blue!), am an avid red wine drinker (love California reds) and use English as a second language when my fluency in sarcasm just doesn’t get the job done.

    Richard Soloman

    I’ve been involved in the development of PCI chips dating back to the NCR 53C810 and pre-1.0 versions of the PCI spec so have definitely lived the evolution of PCI Express and PCI since the very beginning! Over the years I have worked on variations of PCI, eventually moving on to architecting and leading the development of the PCI Express and PCI-X interface cores used in LSI’s line of storage RAID controller chips. For the last ten plus years I've also had the honor of serving on the PCI-SIG Board of Directors and holding a variety of officer positions. I am still involved in PCI-SIG workgroups and I present at many PCI-SIG events around the world. Back before the dawn of PCI, I received my B.S.E.E. from Rice University, and hold over two dozen U.S. Patents, many of which relate to PCI technology.

What to Expect When You’re Expecting … a Spec

Posted by Richard Solomon on March 31st, 2014

Marvin the Martian

Marvin Says it Best ... Delays, delays!

Well, I should know better, but in my New Year’s Resolution post I said “Those of you who are PCI-SIG members should soon see what PCI-SIG calls the ’0.3 draft’ of PCIe 4.0…“  Sigh. Did I say “soon”?  I meant, “eventually” – oh crud, no, let’s be honest, I meant “soon”.  If truth be told, I really thought “soon” would be before the end of Q1 … yeah, I know, that’s today…thus this blog posting.

Partially that’s because ever since PCI-SIG started putting out these 0.X drafts, the 0.3 of any specification has been little more than “We’re thinking about doing some new stuff, like A, B, and maybe C, unless you like D – which we might do if enough of you want it”.  The standard for releasing a 0.3 is pretty low, it needs to have:

  • a problem definition
  • an architectural framework to solve the problem(s)
  • MAYBE some methods for solving the problem(s)
  • MAYBE (though probably not if a new spec) contains all the normal specification sections

Historically 0.3s have looked kinda like this one – a previous spec with a few pages of changebar material thrown in.  So given that, you can see why I and others would expect PCI Express 4.0 Draft 0.3 to be a pretty quick drop – “Take PCIe 3.0 and run it twice as fast”.  Things didn’t quite work out that way.  There were some miscommunications within the PCI-SIG workgroups as well – one group sent its part of the spec for cross-workgroup review labeled as if it were the complete 0.3, etc, etc…  All the same kinds of things that go wrong with “real” projects in your own company go wrong with standards organizations.  Add in a 100% volunteer “workforce” all of whom have “day jobs” – usually in design and development, and you’ve got a perfect recipe for schedule creep.

The good news is that this time around, the 0.3 draft is going to actually be a draft – as in the specification in early form, not just an old spec with some very small amount of new material stuffed in here and there.  We’re building on top of the PCI Express 3.1 specification, so 4.0 in all its drafts will look like a logical progression – because it will *BE* a logical progression!

Whoa, hold it right there Mister!” you’re probably thinking about now “PCI Express 3.1 isn’t even out yet!!!

Ah, yeah, there’s that too.  Since we’re building atop 3.1, we kinda have to get 3.1 perfect and released before we can get the first 4.0 draft out.  Again, all goodness in terms of getting a really solid spec, but all the time you can just hear Marvin saying “Delays! Delays!” can’t you?

Did I mention PCI-SIG has a new team of tech writers, who were volunteered by their company?  So add in a learning curve to all the above, and toss in a ton of legacy documentation in old formats which aren’t very friendly to large documents.  (I’m not going to name any names but if you’re thinking of a common word processor whose name rhymes with “bird” you’re probably dead on.) 

Sorry, I guess this has ended up a lot more like a “dog ate my homework” posting than I really planned on, but at least the PCI Express 4.0 Draft 0.3 should wow you when it finally comes out … soon.  <Ducking>

If I’m wrong this time around, then Marvin will likely blast me with his ACME Disintegration Pistol in sheer frustration.

 

As always, thank you for reading ExpressYourself and please avoid being zapped by an Illudium PU-36 Explosive Space Modulator by simply clicking here to subscribe to this blog!  If you’re not a SPAMbot, feel free to leave a comment with your favorite Looney Toons character – or maybe a PCI Express topic you’d rather read about.

Richard

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Posted in Architecture, PCI Express, PCI-SIG, Specification, Uncategorized | No Comments »

Spring Ahead

Posted by Richard Solomon on March 9th, 2014

Unless you are Rob Ford of course, if you live in North America, you probably spent your Sunday morning much like I did – going around to every clock in the house and setting it an hour forward.  If not, or if you ARE Rob Ford, then I’m sorry I didn’t post this blog entry on Saturday… 

As I went around turning dials, pressing buttons, and occasionally grumbling aloud at the different sequences of buttons required to change various electronic devices’ clocks, I thought how nice it would be to have clocks which kept themselves in sync.  Now, I do have a number of clocks and watches which synchronize themselves to the atomic clock in Ft. Collins, but the majority of my timepieces do not.  (As an aside, my children will happily tell you that “Dad has too many watches!” – hey, I’m a techno-geek, and there are so many cool technologies in watches!  Which, as a second aside, reminds me to send a note to Pebble asking them why the heck their “Smartwatch” wasn’t smart enough to switch to DST when the phone it’s paired with did…)

All these ruminations on time got me to thinking this might be the perfect day on which to discuss one of the lesser-known PCI Express functions – Precision Time Measurement (PTM) - which came out as an ECN to PCIe 3.0 early in 2013.  Unfortunately, you can’t (yet?) go out and buy a new oven (or mayor as far as I know) with PCI Express PTM in it and never have to touch the time setting again, but PTM provides some new functionality to PCI Express which helps in other ways. 

To understand why PTM is useful, we have to first think about where time is important in a system.  As a note, when PTM refers to the “clock” it means the “wall clock” or “system time” (as in X seconds have elapsed since January 1st, 1970, or some similar measurement) as opposed to the reference clock or any other “clock” which causes digital logic to change state at some regular interval. 

Consider one case where we have several instruments collecting data and sending it to a host for storage.  PCI Express doesn’t make any guarantees about the order of arrival for packets from different agents, and depending on the topology, those packets could have very different delays from sender to the ultimate receiver.  This means that each packet needs a timestamp so the host can reassemble the data in order – and prior to PTM, it would be entirely device-specific how those timestamps were created.

Consider another case where there are two different video cameras capturing the same scene from different angles – and we’d like the frames to all arrive at the host at about the same time so they can be processed together.  (Think automotive collision avoidance systems, robotic vision, etc…)  Here we not just want to be aware of the absolute timestamp, but the path delay for each component – so that we can adjust the buffering on our cameras to align not when the packets are transmitted, but when they will be received!

In order to achieve these things, PTM provides a new Extended Capability in PCI Configuration space which tells software that the device supports PTM, offers various enables for PTM operation, and includes information about the device’s internal clock (if any) frequency and granularity.  Three new PCIe Messages are part of PTM:

  • PTM Request
  • PTM Response
  • PTM ResponseD

The PTM Request and PTM Response are Msg (no payload) types, and signal PTM devices to make note of their internal timestamps at the time of transmission/reception.  PTM devices then can calculate the time delay between components based on these timestamps.  The PTM ResponseD is a MsgD (message with data payload) that includes a 64-bit time value and a 32-bit time propagation delay. 

Full details of the PTM protocol can be found in the Precision Time Measurement (PTM) ECN on the PCI-SIG website.  In summary, PTM:

  • allows coordination of “wall time” between different PCIe devices
  • allows calculation of precise propagation delays between PCIe components
  • does NOT keep Richard from having to change his clocks between DST and non-DST times

Thanks for reading  ExpressYourself, please leave a comment below with your thoughts on places PTM could be useful, or what Toronto should do with their mayor, or really any other non-SPAM topic.  As always, if you haven’t already done so, please click here to subscribe to this blog - and don’t forget to set your clocks!

Richard

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Posted in Architecture, General Protocol, PCI Express, PCI-SIG, Specification, Uncategorized | No Comments »

If Interested in M-PCIe – Time is Running Out. Click on This Now!

Posted by Scott Knowlton on February 19th, 2014

Doesn’t that sound like the end of a commercial to buy something? SPAM? It’s not. This isn’t a plug to buy something. I promise.

I wanted to make you aware that PCI-SIG sent out a survey inquiring about interest in M-PCIe testing at the April and/or August workshops and setup a survey to gather feedback. I encourage you to go and take the survey.

The proposed testing would be done using a PCIe-to-M-PCIe switch connected to a PCIe root complex as there is not an M-PCIe based Root complex available (Let me know if you know of one). The switch and M-PCIe based endpoints are connected via 4 SMP connectors (TX+/TX-, RX+/RX0, Note: no refclk as defined by M-PCIe ECN) and viola, it’s an M-PCIe link running the PCIe protocol just as it is defined. Once connected, the existing PCI Express test collateral (PCIECV, etc) will be executed, giving feedback on your M-PCIe implementation.

I encourage people to sign up for the testing. It is always great to test with other developers in the ecosystem and ensure your product plays well with others. It is a foundational principle here at Synopsys for our IP development and allows us to provide quality IP to you, our customers.

Here is the part where you have to act fast. The survey closes on February 21, 2014, so time is running out and you need to click on this now: https://www.surveymonkey.com/s/D8DPJ7D

I know that Valentine’s Day is passed and I hope you spent time with your loved ones. However, show your love for this blog (and me and Richard) by clicking here to subscribe to this blog.

We return you to your regularly scheduled program…

 Scott

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Posted in General Protocol, Low Power, M-PCIe, M-PHY, PCI Express, PCI-SIG | Comments Off

New Year’s Resolution

Posted by Richard Solomon on January 15th, 2014

What’s that? Yes, actually I *am* aware that New Year’s day was two weeks ago!  What do you mean I’m late? No, no, wait I see the problem – not THAT kind of resolution (who keeps those anyway?), but the “number of pixels I can see” kind of resolution :)

This was all spawned by an e-mail I got around New Year’s day from a major consumer PC maker inviting me to experience “4K gaming”.  I gather that in the TV/video world “4K” is being replaced by “UltraHD” – and it seems we learned nothing from the “HD” experience as there are at least 2 different resolutions being called UltraHD/4K.  I’m not much of a video guy, but I assume the original was 4096 x 2160 (thus the 4K – as all true geeks know K = 1024) but it’s now also applied to 3840 x 2160 (which at least is the 16:9 ratio we’re all getting used to).  My trusty calculator tells me that even the “low” resolution works out to over 8 million pixels (8,294,400) – and figure that no true gamer would accept less than 24 bit color, so 3 bytes per pixel works out to 24,883,200 bytes per screen.  Multiply that by 60Hz (I know, no modern gamer could tolerate a piddling 60Hz refresh rate, but humor an old timer) and you get 1,492,992,000 bytes/sec.  Let me use my poetic license here and call that 1.5GB/sec – and maybe you can start to see how 4K gaming enters my admittedly PCIe-centric world. 

Who needs PCIe 4.0 anyway?

Hmmm, I wonder if 4K gamers might want to double their PCIe bandwidth?  I mean if the frame buffer is being read out at 1.5GB/sec, how much more do you need to update that and keep all of your Doom19* monsters awash in gore?

I wonder if there’s any need to get data off disk to create all those 19th generation monsters?  I know I’m still channeling my former life as a storage guy, and that I’ve talked before about  PCI Express in your Disks, but I may not have shared an insight I got from some of my former LSI colleagues.  Back when PCIe 3.0′s 8GT/s data rate was new and seemed like “a lot” I asked some of the flash-storage folks “how much bandwidth can you really use?” – in what was probably a bit of sarcastic tone, as I expected an answer well under the maximum available in a x8 PCIe connection at the time.  Their dead-serious response was “as much as you can give us!” and they backed it up by showing me how they really could scale flash performance up by scaling out the number of NAND chips they used.  In simple English that means PCIe storage also has the potential to suck up truly massive amounts of PCIe bandwidth.

So here’s where my resolution comes together with New Year’s – the first draft of the PCI Express 4.0 specification.  Those of you who are PCI-SIG members should soon see what PCI-SIG calls the “0.3 draft” of PCIe 4.0, but it’s by now very old news that 4.0 will include the 16GT/s (sometimes called “Gen4″) signaling rate.  I would bet good money** that we won’t get a final “1.0″ version of PCIe 4.0 (how confusing is THAT nomenclature) this year, but we should see the earliest formal spec coming out, and maybe, just maybe, some cutting edge implementers showing off a technology demonstration or two…

Here’s to a great 2014 for PCI Express, and a (belated) “Happy New Year” to all readers of  ExpressYourself!  What other technology drivers would YOU expect to drive adoption of PCIe 4.0?  Leave a comment below with your thoughts, and as ever, check off your own New Year’s resolution by clicking here to subscribe to this blog and become one of the proud few folks who kept theirs.

Richard

*Yeah, I know there’s no Doom19 – I lost track after Doom3 I think, but I get to take those kind of liberties every now and then!

**Those that know me know that my maximum bet is $1, so keep that in mind whenever I talk about betting…

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Posted in General Protocol, Market Adoption, PCI Express | Comments Off

Farewell 2013!

Posted by Richard Solomon on December 31st, 2013

So long 2013, you were a great year for PCI Express (and for me personally) but your 365 days of fame are winding down as I write this. You gave us lots of new PCI Express features – especially around low-power.  First you brought the L1 Substates ECN providing “traditional” PCIe PHYs with impressive power savings modes, and later on the M-PCIe ECN opening up the PCI Express infrastructure to MIPI M-PHYs in what Scott aptly described as A Match Made in Heaven.  Later you even had the much anticipated M.2 Specification to define a wide variety of PCIe mobile-oriented plug-in cards which enable some exciting new PC/Tablet form-factors

Yes, yes, 2013, we won’t forget that you weren’t only about mobile – you  also had the SRIS ECN which better enabled cabled environments to let us put PCI Express in our Disks.  You’ll also get to hold some sort of record for the longest delay before spec release by being the year in which CEM 3.0 was finally released – some 3 years after your great-grandfather 2010 birthed the PCI Express 3.0 Base Spec.  (Let me say with the utmost respect 2013, that I hope you hold that particular record forever!) 

I’m sure you were tremendously proud, 2013, of being the year in which official PCI-SIG 3.0 Compliance Testing began - after all, how many other years get to ask “Got Compliance?“  We at Synopsys were particularly happy to share that event with you – being in the very first group of designs on the PCI-SIG Integrator’s List.  (Thank goodness we were spared a picture of Scott with a milk mustache there!)

2013, you were a great year for PCI Express education and training – hosting the second-ever PCI-SIG Developers Conference Israel, another record-setting attendance PCI-SIG Developers Conference in the US, and a PCI-SIG Developers Conference Asia-Pacific Tour 2013 with the first-ever Members Implementation track in Asia.  Even if I managed to complain about When Engineering Fails the Obviousness Test, that event was a smashing success.  I don’t know if it will be anywhere near as momentous as the others, but 2013 you also have the distinction of hosting my first ever webinar.

Continuing on that more personal note, 2013, you kicked me squarely in the complacency by offering an I-couldn’t-pass-it-up opportunity to move to Synopsys after almost 23 years at LSI.  Aside from providing payback material for years of jokes about a “two drink minimum”:

you’ve given me an incredible new branch to my career.  The jury is still out 2013 on how the world will view you for giving me a new venue here to ExpressMyself - with apologies to Scott for taking liberties with the name (and for that matter the content) of “his” blog :)

Since I’ve known you for your entire life 2013, I feel I can be honest and point out that it hasn’t been all roses for us:
Black Forest fire near 8pm Tuesday
but rest assured that I won’t hold that against you, since I more than anyone recognize that the only constant is change.

Let me also offer a huge Thank You to all you readers of ExpressYourself for spending a portion of your 2013 here with Scott and me.  For those of you just joining us, consider clicking here to subscribe to this blog as a possible New Year’s resolution – or skip the rush tomorrow and just do it now! :)

Richard

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Posted in Architecture, General Protocol, Low Power, M-PCIe, PCI Express, PCI-SIG, Specification | Comments Off

The only constant is change

Posted by Richard Solomon on December 20th, 2013

I guess Heraclitus’ real quote is more like “Nothing endures but change” but I’m going to claim poetic license here and stick with “The only constant is change” - because I like the apparent contradiction better.  Two events this week drove home the aptness of this quote to me.  First we had the announcement that my previous employer LSI was being purchased by Avago.  I’m not much of a business person, so I’m not sure quite how to interpret “drive LSI’s operating margins toward Avago’s current levels” but I do know how to interpret a stock price jump from around $8/share to around $11/share!  (I believe the technical expression there is “Woo hoo!”)  Second, we have a raft of internet news sources reporting that Calxeda is restructuring (or shutting down, depending on whose account you read).  I don’t read “restructuring” (as Calxeda is quoted) quite the same as “shutting down”, but hey, we already established that I’m not a business guy.  I guess I can’t complain too much about that use of poetic license though since I just exercised it at the top of this posting. 

The LSI-Avago deal may not have a huge impact on our industry, beyond the employees and stockholders of course, but it hits close to home for me personally.  However, it would be hard to overlook the impact that Calxeda has had on the course of servers in the last five or so years.  While there are several companies developing in the ARM server space, Calxeda was one of the first and one of the few that appeared to already be successful in getting silicon into real products.  Much ink (and electrons) will undoubtedly be spilled in the weeks ahead arguing whether this signals the downfall of yet-another-x86-competitor in the server space or not.  (Does anyone else remember the Advanced RISC Computing standard?)  I would argue that more importantly it shows the ripples of change are spreading throughout the server industry.

I’m not sure the origin of the statement that “A pioneer is someone lying face down in a field with arrows stuck in his back” but it seems a bit apt here.  Back when Calxeda was founded you would have been hard-pressed to find anyone worried about server power consumption.  “Servers care about three things” we’d say “performance, performance, and performance!”  Today in contrast one finds data centers located near icy bays to ensure cooling!  Suddenly power consumption in servers became almost as important as performance – well, maybe even MORE important than performance.  ARM moved from what “everybody knew” to be a mobile CPU vendor, to a contender in the 64-bit multi-core “serious server” CPU space.  Even mighty Intel is building server-class CPUs whose focus is at least as much on low-power as it is high-performance.  I think it’s clear that pressure from folks like Calxeda helped bring on that particular change!  Whatever your opinion on exactly how we’ve come to this point of power-efficiency focus, now more than ever “the only constant is change.”

Even the PCI Express interface, which is almost universally used in servers is undergoing change – as Scott and I have been talking about M-PCIe here for months now.  So whatever CPU your next great server-on-a-chip (or any) design uses, and whether you support PCIe or M-PCIe (or both), you can count on us for the IP you need to make that project a success.  Ok, so some things never change :)   I suppose this is as good a time as any to mention that the Synopsys DesignWare IP for PCI Express can also provide a native interface to various AMBA interfaces found on those ARM server CPUs to connect to either PCI Express or M-PCIe. 

Please leave me a comment below with your opinion on ARM servers, low-power servers, or even just applicable quotes from history.  As always, thank you for reading, and if you haven’t already done so, please subscribe to ExpressYourself .

Richard

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Posted in Architecture, General Protocol, M-PCIe, Market Adoption, PCI Express | Comments Off

Burgers in Grenoble???

Posted by Richard Solomon on November 30th, 2013

Yes, I said “burgers” and not “burghers” but more on that in a bit… I have to apologize for the lateness of this posting, I didn’t realize until I was writing the last one that I had NOT actually typed this up.  So here I’ve been wondering why no burger/burgher cracks have been showing up in my inbox and it turns out that the main reason is this blog post has only been in my head until now.  Sigh.

Anyway, it all began with the 2013 IP-SOC Conference.  Some time back I submitted an abstract to talk about M-PCIe, and in October I found out that it was accepted.  I was pretty excited both by the opportunity to regale a whole new audience with my geek engineer jokes, and by what would be my first trip to France.

The World Trade Center in Grenoble - Site of IP-SOC 2013

IP-SOC is a unique event in that it’s completely devoted to topics relating to IP-based design.  Obviously that’s right up our alley here at Synopsys, and we actually had 3 different papers accepted for presentation – plus a keynote speech.  (No, no keynote for me!)  We also had a booth showing off our M-PCIe demo and highlighting a wide variety of IP core offerings.  Here’s the booth after we set it up and before the show opened:

The Synopsys Booth at IP-SOC 2013 (Before hours)

The conference is modeled along the lines of what I think of as a classic scientific conference – where the primary content is in a paper written and submitted while the presentation is more to get people interested in the paper itself.  Consequently, IP-SOC presentations are quite short – maybe 20 minutes per speaker, so you have to get in a lot of information quite quickly and yet not leave the audience with their heads spinning.  In all honesty I didn’t exactly have that idea in my head when I submitted my abstract.  I’m much more used to a model where the presentation stands alone. 

One big advantage to the high degree of focus IP-SOC has is that virtually all of the audience is actually interested in your topic.  So while overall the event felt small in attendance, the attendee interest made up for most of that.  Incidentally, IP-SOC allows the public to see presentations afterwards, so you can actually click through to view the Synopsys presentations: mine on M-PCIe, Manuel Mota’s on Analog IP, and Johannes Stahl’s keynote on Virtual Prototyping.  I’m not sure why Srikanth’s presentation on verification isn’t linked, but he had good turnout for his session and a lot of interest.  I hadn’t met Manuel or Srikanth before but we all got along well and Manuel kept up a running French cultural translation for Srikanth and me :)  

I mentioned in my last posting that I didn’t get a chance to visit any of the French offices of Synopsys, but that didn’t stop them from turning out to help with the event!  Philippe, Didier, and Fabienne toted what seemed like a ton of gear out to the conference center, not to mention set up much of the booth, and stood there to answer most questions – and help translate for those that needed my expertise.  Srikanth sent along this photo of part of our crew – I think I was mid-wisecrack when the flash went off so I look even goofier than usual ;)

Philippe, Srikanth, Richard, and Didier near the end of IP-SOC 2013

The whole Synopsys France crew was absolutely great to work with, and they went out of their way to take care of us out-of-towners.  That finally brings me to the promised explanation of the title of this posting…  The conference was Wednesday and Thursday, so Wednesday night after the end of show hours the local folks invited us out to dinner.  They took care of reservations and transportation, getting the group of us out to a nice little restaurant somewhere in Grenoble.  Luckily for me (and I’m sure by considerate planning) there was an English menu, so I had no trouble navigating my order.  One of the first things that caught my eye though at the top of the menu was a hamburger – and I confess I suspected either a trick or a cultural assumption at play.  Determined not to fall into the stereotypical American eater, I resolutely ignored the burger and picked a chicken dish.  You can probably guess where this is going – three out of four French people at our table ordered the burger!  Apparently it’s a specialty of the house – and because it’s made with foie gras it’s NOT an American hamburger, it’s gourmet fare :)   Oh well, maybe next time.

All in all, a good event – the Synopsys presentations all seemed well-received, and I hope we’re invited back next year.  Thursday night as the locals headed home I relied on TripAdvisor to steer me to a unique restaurant with a truly awesome flaming beef dish – which I will post a picture of only on request…  So there’s one more incentive to add a comment below and to subscribe to ExpressYourself .

Thanks for reading!

Richard

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Posted in Low Power, M-PCIe, PCI Express, PCI-SIG, Specification, Uncategorized | Comments Off

Thanks!

Posted by Richard Solomon on November 28th, 2013

Today is Thanksgiving – a unique holiday in the United States where we celebrate American Rules Football, eating to massive excess, and the wonders of a retail holiday which sounds like a medieval disease – with similar out of control growth.  (After the third or fourth retailer e-mail touting “Black Friday Deals All Month!” I confess to becoming just slightly jaded.)

As I write this, I’m hiding out in the living room while my wife and children turn our kitchen into the climactic scene from an action-adventure movie using kitchen implements, flour, and turkey parts instead of automatic weapons, broken glass and blood.  This makes me smile and reflect on all the things I have to be thankful for this year.  Well, in truth, to mostly reflect on all the people I have to be thankful for this year. 

Kathy, Andrew, and Rebecca (the aforementioned stars of the kitchen adventure) continue to be the center of my world – and though not every storm is calmest at its center, they’ve all been amazingly tolerant of my job transition this year.  Balancing school, homework, extracurriculars, and a new work schedule isn’t easy – for their parents either!  I often talk about people who “make me look good” – not in the comparison sense but the supporting sense – and my family is that behind-the-scenes group that most of you never see who let me go out in the world and be my best.

I might have first coined that “you make me look good” phrase to describe the VTM folks who support PCI-SIG.  Kait, Molly, Ruth, Reen and many others have all helped make 2013 a great year for the Developers Conferences – in Israel, Japan, and Taiwan.  I can’t possibly thank them enough!  When you come to one of these events, it’s probably those people who make it a good experience for you – and if not, remember to follow my advice and “blame Richard!” :)   It’s a bit sad to bid Kait farewell as she too takes the “new job” path this year and moves on to the next phase of her career.  (Don’t blame me for this one though, I tried to bribe her to stay!)

Speaking of job changes, in looking back on almost 8 months with Synopsys, I’m most thankful for all the new friends I’ve made.  I’ve been to sites in Austin, Dublin, Hillsboro,  Mountain View, and Tokyo – and found many kindred spirits in each place.  From “English to American Translation” with the Ireland guys, to the “Great BBQ Debate” with the Texas crowd, and to hero status for Uchi-san keeping me company shopping the Taipei night market with the VTM crew, I can’t say enough about how awesome all the “Synopsoids” are.  (I’m not forgetting the France gang and the “burger trick” – I missed visiting their office, but they definitely made me look good at IP-SOC!)

Not to overlook old friends (no Scott, not “friends who are old” but “friends of long duration”) too numerous and widespread to name individually, I am thankful for you all!

Wow, I guess I’ve failed at properly celebrating Thanksgiving – it’s midday here in Colorado and I’ve not watched even a single football game.  Someone pass the homemade bread and that Sportsman’s Warehouse newspaper ad!  Let the holiday begin!

Thankfully yours, Richard

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Posted in PCI Express, PCI-SIG, Uncategorized | Comments Off

When Engineering Fails the Obviousness Test

Posted by Richard Solomon on October 22nd, 2013

Way back in the day, Arsenio Hall did a number of comedy routines called “Things that make you go hmmm…” in which he pointed out any number of humorous examples of seemingly obvious examples of bad ideas, poorly named products, etc.  In engineering circles we sometimes classify these as ideas which fail the obviousness test – as in “It should be obvious to the most casual observer that this is a bad idea”…

I’m posting this from Taipei, Taiwan where the PCI-SIG Developers Conference Asia-Pacific Tour 2013 just wrapped up.  A few funny things happened to me on the way to this particular forum – which gave me the idea for the title.  I should hurry to reassure everyone that it was nothing related to the show itself which failed my obviousness test!  In fact, this was an exceptionally successful Developer’s Conference.  We had over 200 attendees here in Taipei, with another 130 or so last week in Tokyo. 

I was particularly pleased because this Taipei event is the first time PCI-SIG offered the Members Implementation track in Asia.  (For those that may not know – PCI-SIG generally presents information on the specifications themselves, while the Members Implementation track allows anyone from a PCI-SIG member company the chance to present on ways they actually use PCI-SIG technologies like PCI Express.)  I’ve had many opportunities to present for PCI-SIG here in Asia (wearing my PCI-SIG hat I like to say), and this trip I got to do both my traditional PCI Express Basics and Background session and a short overview of the new M.2 and OCuLink form-factors.  This time though I also got to “wear my Synopsys hat” and present my Migrating PCIe Designs to M-PCIe material.  I had one of the tougher time slots – right after lunch with a room of engineers who just ate an excellent meal from the Westin Taipei’s kitchens, but it seemed to go quite well.  A good number of attendees came by afterwards to see the M-PCIe demonstration platform I described.

Visitors to Synopsys' Booth at Devcon Taipei 2013

Uchi-san and William explain M-PCIe demos to APAC Devcon attendees

That actually takes me back to the title of this blog posting and engineering efforts which fail the obviousness test…  Since Scott got dragged off to visit some customers we used the video Scott instead and ran a loop of his Intel Interoperability video

Scott "presents" by video in Taipei

"Video Scott" showing our M-PCIe Interoperability Demo

Now in Tokyo I just hooked my laptop up and let it play the video, but that was a drag because I had to keep connecting and disconnecting the monitor when I wanted to use my laptop between exhibit times.  Hanging out in Taipei over the weekend I got the bright idea to purchase a standalone video player and use that instead.  Of course since Mandarin is the most common language in Taipei, my new player came configured with that as the default language.  Not being able to read Mandarin, I stumbled through the various settings (at least easily identified by the “gear” graphic) looking for something that said “English” figuring the list of languages would include each in it’s own language!  Bzzzzt!!  Wrong!  I saw something like “英語”, “西班牙人”, “中國的”.  When I finally got the player configured in English, it gave me an English list of languages  (“English”, “Spanish”, “Chinese”). 

Wouldn’t the obviousness test dictate that my choices be “English”, “español”, “中國的”?  Thus each language’s native speakers would see his/her own language listed in a way s/he could actually read it!

Actually if truth be told, my first encounter with failed obviousness tests this trip was on the flight over – on the new Boeing 787.  Make no mistake, the 787 is a very cool airplane, and the geek engineer in me absolutely loves the idea of the electro-chromatic windows, but did no one on the design team ever actually fly transoceanic in a 787 before releasing these???  It turns out I’m not the only one to complain about this – but the darkest setting on the windows doesn’t make the cabin actually dark.  Worse, I was in a window seat on the sun side of our Los Angeles to Tokyo flight – so I had this bright blue disk of sunlight in my eyes the whole way.  Again, the obviousness test would seem to be to actually try out new features before shipping them!

Thanks for reading Express Yourself , and thanks to all the attendees in both Tokyo and Taipei for making this Developers Conference such a success!  As always, please subscribe and feel free to leave a comment with any other obviousness test failures – especially if you feel there are any related to PCI Express!

Richard

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Posted in Architecture, General Protocol, M-PCIe, PCI Express, PCI-SIG | Comments Off

M-PCIe Ecosystem: Men at Work…

Posted by Scott Knowlton on October 17th, 2013

I’m in Japan this week and Taiwan next week for the PCI-SIG conference and we are showing demos for PCIe Gen3 PHYs and our M-PCIe controller with Gear3 MIPI M-PHYs. As part of our demo, we also showed Teledyne LeCroy‘s TeleScan PE Utility, which has just been updated to support M-PCIe and this is the first public appearance of the changes. The TeleScan PE utility allows a user to quickly look at the configuration status of a PCIe or M-PCIe interface, which is very useful to developers looking to see what’s going on inside of their chip. Using Synopsys’ “Industry’s First GEAR3 M-PCIe and M-PHY Demo”, we have taken a screen shot using the TeleScan PE Utility and it is shown below:

Telescan PE display of Synopsys M-PCIe

Notice the tool has recognized our M-PCIe device and has read the capabilities and the current status.

The tool has been very useful to use in showing what’s going on in our core and demo HW. So, why is this important to us and to you? As new technologies like M-PCIe are rolling out into the industry, it is important to see different companies in the ecosystem working together as another proof that their products are interoperable and that the protocol is gaining momentum. Of course, this lowers the risk for anyone that wants to use products that can already show interoperability. Keep an eye out for additional M-PCIe products as they are rolled out…as the title says, “Men at Work”.

Synopsys is providing IP for the M-PCIe interface including controllers and PHYs. For more information on Synopsys’ M-PCIe solutions, please visit the Synopsys web site.

The LeCroy Telescan PE Utility supports PCIe 1/2/3 and M-PCIe. They just announced support for M-PCIe today and you can read their announcement. If you’re interested on the features and capabilities of the Teledyne LeCroy Telescan PE Utility, you can get more information here. Oh, and did I mention the best part of this utility? It’s free! Click here to download.

 As always, we’d love to hear from you on the value of these posts and any ideas that you’d like for Richard or I to talk about.

 Enjoy,

Scott

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Posted in General Protocol, Low Power, M-PCIe, M-PHY, PCI Express | Comments Off