HOME    COMMUNITY    BLOGS & FORUMS    Conversation Central Podcast
Conversation Central Podcast

So you think verifying an FPGA is a piece of cake? Think again.

Posted by Hannah Conrad on June 30th, 2013

Guest: Sheela Pillai, Director of Verification, Altera

Host: Yvette Huygen, Director Worldwide Public Relations and Corporate Communications, Synopsys Inc.

Audio clip: Adobe Flash Player (version 9 or above) is required to play this audio clip. Download the latest version here. You also need to have JavaScript enabled in your browser.

If your browser doesn’t support Flash, click here to download the show and play it locally.

With the spotlight on increasing complexity of microprocessors and SoCs, it’s tempting to think that FPGA verification isn’t so difficult. After all, FPGAs are much smaller so their challenges are smaller, too, right? Wrong. Sheela Pillai talks about why FPGA simulation is not only different from verifying other kinds of chips, but it comes with unique challenges that are no less daunting.

Sheela Pillai: “FPGA design has changed quite a bit over the years, specifically for the last decade. It is becoming more and more realization to silicon. It is more hard IPs and functionalities integrated in silicon.”

During the show, Sheela talks about:

  • What makes the modern FPGA so challenging and complicated
  • The most complicated challenge she has faced when dealing with FPGAs today
  • The challenges she faces when introducing new FPGA methodologies and what she does to convince people to adopt them
  • Her involvement in  interesting allocations that complex FPGAs have been used in
  • Advice she would give to engineering students
  • Her thoughts on whether or not the complex FPGA will become more complex in the future

Links of Interest:


Share and Enjoy:
  • del.icio.us
  • Digg
  • Facebook
  • Google Bookmarks
  • Print
  • Twitter
  • StumbleUpon
  • LinkedIn
  • RSS