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Breaking The Three Laws
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    Breaking the Three Laws is dedicated to discussing technically challenging ASIC prototyping problems and sharing solutions.
  • About the Author

    Michael (Mick) Posner joined Synopsys in 1994 and is currently Director of Product Marketing for Synopsys' FPGA-Based Prototyping Solutions. Previously, he has held various product marketing, application consultant and technical marketing manager positions at Synopsys. He holds a Bachelor Degree in Electronic and Computer Engineering from the University of Brighton, England.

You don’t buy a dog and bark yourself

Posted by Michael Posner on July 2nd, 2014

woof

I have a set of witty one liners which I use to respond to a variety of situations that I encounter in my everyday life. Some are insightful and designed to share my wisdom while others are just supposed to be a little humorous. The title of this blog is one and I have listed a set of my favorite quotes below including the typical situations which I use them. Feel free to use these in your everyday situations as I am sure they will be as impactful for you as they are for me. I might not have been the first person to come up with these quotes so don’t get upset if you use the same ones already.

“Don’t let the technical details get in the way of a good story”
As I’m in Marketing I use this one frequently. Many times I see presentation material getting bogged down in the nitty gritty technical feature review and missing the VALUE and BENEFIT that the solution brings to the customer. This is when I use this quote to remind the team to start with the end, what is the benefit to the customer and then construct a story to deliver this message.

story

“Hope is not a strategy”
Oh by far this is my most used quote. I never rely on hope, I make things happen by planning out an execution path to reach the end goal. All too often I hear things like “I hope we can get this working” or “I hope we can repeat this success”. Hope is not going to help, you need to help yourself and create a plan then execute on it. People who rely on hope rarely succeed. Actually, there is a whole book on this topic.

hope

“I see a lot of hope and not a lot of action”
I typically use this quote hand in hand to the one above. I use this to describe a plan which has a lot of holes or gaps between actions or if I see no progress towards a goal. It’s great to have a goal with a plan to reach it but if you are not putting in the effort to action the plan you are back to hope and as we now know, hope is not a strategy.

“A vision without a plan is just a wish”
Notice there is a bit of a theme going on here. It’s great to have a vision but if you don’t have an execution plan to work towards you are just wishing for it to happen. Life is not a movie, wishes are not real so if you want to deliver on a vision you need to plan and execute.

plan

“Givers need to set limits as takers rarely do”
I’m a giver, this does not mean I’m a sheep and follow the herd it means that I set a very high bar for myself and always want to over achieve and impress. This of course can lead to personal issues when it’s taken for granted that you will always get the job done no matter of the situation. It’s fine for a giver to push back and set limits. Quote by Henry Ford, American industrialist a man I admire greatly.

ford

“You’re quick or you’re dead in this game”
I use this one to respond to a variety of situations. Sometimes I use this when I rush to get to the front of the line at the airport when a flight in cancelled. Ok, so a situation like this is not life or death but if you are going to secure a seat on the next flight you have to act fast. I’ll also use this when I am the first to get a second serving to food, similar to survival of the fittest.

quick

“Do not judge by the problem, judge by how the problem is solved”
I love this quote. A while back the hotel laundry shredded the sleeve of one of my very favorite shirts when it got caught in the machine. This could have been a horrible situation but the hotel handled the problem very well. First they found a store that sold the very same shirts, unfortunately the store did not have my size so the hotel was unable to directly replace. They then offered to pay for a new shirt, regardless of the type, when I purchased a new one. As it happens that shirt was purchased in London’s Heathrow airport and while on a business trip I purchased a replacement. 6 months later I return to the hotel which had shredded my shirt and handed them the receipt for the new shirt. The hotel gave me the cash value. My shirt could have been destroyed at any hotel, that stuff happens. Judge by how the problem is solved and not by the problem itself. The problem solving is what sets everybody apart.

problem

“Who needs products when you have PowerPoint”
I don’t actually say this but my R&D team has used it with me when the presentation I created is 12 months ahead of the product deliverables. Marketing at its finest is what I say and linked to the “Don’t let the technical details get in the way of a good story” quote as seen earlier. Also used in the TV Series “Better off Ted” which IMO was one of the funniest TV shows around and I highly recommend it.

better-off-ted

And finally, “You don’t buy a dog and bark yourself”
I rarely use this one anymore as to be honest it annoys pretty much everyone you use it with but it does communicate a very powerful message across so use the power wisely. This states, without directly saying it, is this is not my job. I have used this with select individuals when they expect me to do something when clearly I do not have the matching skill set and they do but are just too lazy to do it themselves. This quote is highly abusive so don’t expect the person you use it on to ever speak to you again. (Which is some cases is exactly why I use it)

Do you have other quotes you use day to day in your life? If they are PG rated then please share via comments…

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Posted in Humor | 1 Comment »

B2B for Accelerated Time to First Prototype and Assembly

Posted by Michael Posner on June 27th, 2014

holding-hands

This week Synopsys announced the HAPS Connect Program. The HAPS Connect Program is an eco-system of third-party daughter board and services partners for HAPS systems. The HAPS Connect Program expands the choice of HapsTrak and Multi-Gigabit board and service offerings available for HAPS systems. The first members include Fidus, eInfoChips, Sarokal, Gigafirm, Back9 Designs, HDLabs and Zoro. Synopsys is helping connect business to business to accelerate prototype assembly which I have blogged about before here. The HAPS Connect Program helps customers to:

  • Develop HAPS prototypes faster by leveraging compatible daughter boards from leading industry hardware vendors
  • Reduce project risk by taking advantage of hardware and services from vendors with HAPS system expertise
  • Save on prototype development costs and resources by using products and services tailored for HAPS systems

HAPS-Connect-banner

You can see a full list of participating vendors here.

I personally wanted to launch a program like this as I’ve been working with vendors individually for many years. The HAPS Connect Program formalizes the process making it easier to connect HAPS FPGA-based Prototyping customers with vendors with HAPS expertise. Really what I am saying is this program makes my work easier and as we all know it’s all about me J

I think by now all my readers know that I race cars as a hobby but you probably don’t know that I also love to off-road my Toyota FJ. I was out last weekend and for once managed to get some good pictures of the play. The first two don’t make the trail look that hard but just know that by the end of the day I had beaten up the undercarriage of my truck more than ever before and left me limping home with a blown shock absorber and destroyed right front suspension.

Note that the front tire is floating off the ground

Tire-Lift

I love how compressed the rear tire is, shows the articulation you can get with this Toyota.

Tire-Compression

It’s not all about the off road play, the view from this mountain range is beautiful.

View

Finally the crew

Mound-Climb

It’s the July 4th USA week next week so I am not sure if I am going to blog yet. I do have LOADS to blog about but wanted to spread it over a couple of blogs as I’ve noticed that my long blogs bore people to death. Over the next couple of weeks I’m going to talk about PCIe Gen3 prototyping at full speed,  more on the Synopsys IP Accelerated Initiative, my video from DAC and information on building vertical daughter boards, yes vertical!! I have also been asked to write up “Mick’s Quotes” these are a set of quotes I use around Synopsys when interacting with my team, peers and other groups within Synopsys. These quotes are deep and you will be able to use them to wow other with your insight.

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Posted in HAPS Connect Program, Man Hours Savings, Milestones | Comments Off

Zoro delivers Hybrid Prototype for Early Software development

Posted by Michael Posner on June 20th, 2014

Zorro

No not that Zorro, but Zoro, http://zoro-sw.com/

First I should note that I just traveled back from Israel and have been awake for over 40 hours at this point, I wonder if this blog will make any sense at all. I was in Israel to present at SNUG, which was very well attended again this year. One of the papers presented was by a company called Zoro Software and they presented the success they had with deploying Hybrid Prototyping for one of their customers. If you remember Hybrid Prototyping is the combination of HAPS FPGA-Based Prototypes with Virtualizer Virtual Prototypes.

The goal of Hybrid Prototyping is to reduce the time and effort to create a prototyping environment  enabling software development to start earlier as well as HW/SW validation. Zoro was able to deliver on this goal and the details with results of the project are posted in their presentation found in the SNUG proceedings. I took the liberty to take a snapshot of the summary slide as I think it does a great job of expanding on all the benefits of Hybrid Prototypes.

benefits

The even more cool thing was that Zoro Software was also demonstrating the Hybrid Prototype at the SNUG event. Below is a picture of Uri Shkolnik, CEO of Zoro software standing next to the Hybrid Prototyping demonstration. In the demo the USB 3.0 controller was implemented on the HAPS system and an ARM based subsystem is running within a virtual development kit in Virtualizer

Zoro-Hybrid

Another amazing thing was that someone managed to capture me smiling, look….

Mick-at-SNUG

I have no idea why I was that happy, just look at the view I had from my hotel room.

photo

(For those who didn’t get it, that was sarcasm above)

I know Israel is a country at war but it’s pretty beautiful and this was by far the most fun I’ve ever had on a business trip. Of course I did celebrate my birthday (29 again) while on this trip and that was simply amazing. I’m looking forward to getting back to Israel again soon and hanging out with new friends.

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Posted in Early Software Development, HW/SW Integration, Hybrid Prototyping, In-System Software Validation | Comments Off

DAC is Dead!

Posted by Michael Posner on June 13th, 2014

Ok, so I used my blog title for the shock and horror effect in an effort to drive up my readership…… In reality DAC is still flourishing and well worth the trip.

My main two takeaways from the event was that #1 IP is everywhere and #2 FPGA-based prototyping is the best way to demo your capabilities be that design, IP or other.

I’m not going to talk too much about the IP mainly as this is a blog on FPGA-based prototyping. I will say that there were many IP providers at DAC and of course Synopsys announced our IP Accelerated Initiative which I blogged about last week. The amount of IP, 3rd party, in-house developed and other is exploding as seen in the Semicon estimations below. This is why so many companies are jumping on the IP bandwagon

IP-in-SOCs

From last week’s blog I got lots of comments on my top secret testing video which I posted. Comments like “Synopsys (and you) have far too much time and money on your hands if you can go off and shoot a video like that”. Or “Who was actually driving the race car” or “that’s some fancy CGI”. Well believe it or not that was a 100% selfie shot video. It is my race car, that is me driving and I shot the video in my own vacation time. I built that race car myself, including many engines over the years and another little secret is that I used to be quite a big name in the aftermarket and dark world of Subaru tuning. Check out this video of me tuning the antilag turbo system on a dynamometer : https://www.youtube.com/watch?v=Ppv3EMGlITY Now that’s fast and furious style but in real life. No, I don’t drive this car on the streets, it’s a pure race car. The only remaining question that I’ve leave open is if the HAPS-DX system was in fact electrically connected into my car’s ECU……..

HAPS-DAC

At DAC FPGA-based prototyping was being used by many vendors to demonstrate their wares. I think the main reason for this is, and as I have stated before, FPGA-based prototyping makes a great way to showcase a design. Just look at how pretty the HAPS booth display looked (pictured above). How can you resist coming to have a look. FPGA-based prototyping is also a perfect development and validation platform for interface IP, the predominant type of IP after embedded CPUs. Early software development, real world IO for interoperability and pre-silicon compliance testing are just some of the values FPGA-based prototyping brings to IP. This is exactly why Synopsys developed the HAPS-DX IP development system and why it’s an integral part of the DesignWare IP Prototyping Kits.

Finally please join me in wishing Yvette Huygen continued speedy recovery from hip replacement surgery.

Yvette-DAC

I hope Yvette does not mind me posting this picture. The Synopsys DAC event crew reserved a chair just for Yvette which was nice. I can relate to Yvette’s pain as I went through similar hip replacement surgery a couple of years back. Wishing you all the best!!!

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Posted in IP Validation, Real Time Prototyping, System Validation | Comments Off

Top Secret IP Accelerated Testing

Posted by Michael Posner on June 6th, 2014

IP-Accelerated

Synopsys’ big press this week from DAC was the announcement of the IP Accelerated initiative. As this initiative combines Synopsys’ leading interface IP, DesignWare, HAPS FPGA-Based Prototyping systems and Virtual Development Kits as you might guess I have been very involved in this evolutionary development. I executed my own personal top secret testing of the deliverables, more on that later in this blog. I’m so happy that we have finally made this initiative public as I have really wanted to talk about it.

Highlights from the press along with my personal comments on each of the bullets

  • The IP Accelerated initiative augments Synopsys’ leading IP portfolio with new IP prototyping kits, software development kits and customized IP subsystems

Synopsys has taken an evolutionary step and will be delivering packaged subsystems for DesignWare IP with HAPS FPGA-based systems for immediate prototyping productivity, virtual development kits enabling pre-RTL early software development. These DesignWare IP reference subsystems also enabling rapid customization for application specific needs. Customers demand high quality IP where the digital RTL controller has been validated against the mixed signal PHY and Synopsys has always delivered this value. The IP Accelerated initiative delivers the DesignWare IP packed up in a reference subsystem. The subsystem enables Linux to be booted immediately, no effort from the user, and includes the DesignWare IP software drivers. These subsystem references enable the IP users to be immediately productive with either early software development for the select IP. For the hardware or prototyping engineers these subsystems deliver a fully operational prototyping reference which can be used to explore the IP capabilities and accelerate the bring-up of an SoC level prototype.

  • The DesignWare IP Prototyping Kits include a proven reference design for the IP preloaded onto a HAPS-DX prototyping system and a software development platform running Linux OS with reference drivers

Wow, it’s like the Synopsys R&D engineers have been reading my blog and have implemented a hugely scalable IP prototyping subsystem enabling immediate productivity and a flow for streamlining IP to SoC prototype bring up.  I urge you to watch the videos, especially the demo as it’s amazing to see Linux boot so fast and see the IP operating under a real OS.

  • The DesignWare IP Virtual Development Kits are SDKs that include a processor subsystem reference design, a configurable model of the DesignWare IP as well as a Linux software stack and reference drivers

These deliverables are targeted at the software engineers who want to start there customization of the DesignWare IP drivers targeting their specific application. The advantage of the SDK is that they do not require RTL, they are highly portable and very fast. The advantage of the hardware based DesignWare IP prototyping kits is that they include the prototyping model of the DesignWare IP RTL so cycle accurate and physical real world IO enabling compliance and interoperability testing. Software drivers developed on the SDK can be executed on the real hardware to validate their operation in real world scenarios.

  • For hardware engineers, the IP Prototyping Kits provide a validated IP configuration that can be easily modified to explore design tradeoffs for the target application
  • For software developers, both the IP Virtual Development Kits and IP Prototyping Kits can be used as proven targets for early software development, bring-up, debug and test

These are self-explanatory, basically you are productive immediately. Even an engineer with no previous IP, FPGA-based or virtual prototyping experience can use them.

  • To reduce risk and accelerate time to market, Synopsys experts can assist designers in creating and customizing IP subsystems for their specific application requirements as well as integrating the subsystems into their SoC

The deliverables are packaged as a reference but as the IP is highly configurable enabling it to be tailored to application specific needs it’s expected that the deliverables will be modified for specific project usage. Some of this customization is enabled directly in the kits and the Synopsys experts are there to help with this task.

As mentioned above, I have been personally involved and took on a top secret project as a test pilot. You can see the summary of the top secret testing here: https://www.youtube.com/watch?v=WN-ZsLK_IZw

IP_Accelerated_Initiative_test_pilot

Do you have a question on the IP Accelerated Initiative? If yes, post me a comment and I promise to respond.

I was at DAC this week, I’ll write up that fun next week

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Posted in Debug, Early Software Development, Humor, HW/SW Integration, In-System Software Validation, IP Validation, Real Time Prototyping, System Validation, Use Modes | 2 Comments »

Go Faster Stripes

Posted by Michael Posner on May 31st, 2014

It’s was a short week for me with Memorial day on Monday and the I took Thursday off to play at the race track. Next week is DAC so if you happen to be visiting make sure you drop past the Synopsys booth and say hello. I’m only attending DAC on Monday so don’t miss out, maybe I’ll buy you a cup of coffee or something.

My track time this week was tough, I coach for a company called Hooked on Driving and this time I had a novice student who had never been on the track before as well as being the Group D lead. A group lead manages the group ensuring they are safe and controlled. Group D are the top advanced driver group, many of them long time racers, but Hooked on Driving is not a racing event. This group was very hard to control so on top of a novice student I was running around way more than usual. I actually only drove myself in the morning sessions. Here is a link to one lap following one of the Group D drivers. https://www.youtube.com/watch?v=W9eXJ6M2wY4 The good news was that my novice student was very easy going and did a great job on track as well as off track picking me up so I didn’t have to run around too much.

With DAC coming up I promise that I’ll have a lot to write about next week.

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Posted in Mick's Projects | Comments Off

Imagine more, Prototyping GPU’s

Posted by Michael Posner on May 24th, 2014

While at SNUG in England I had the pleasure of being one of the first people on the planet, yes planet, to see the demonstration of the Imagination PowerVR Series 6XT running at speed on HAPS. The demonstration streamed video data from a host to DDR3 on the HAPS system via a PCIe connection. This video data is then manipulated via the GPU and output in real time to DVI for display on a monitor. The demonstration was very impressive and eye catching to anyone who reviewed it. Imagination internally developed this setup to do what they call DriverLive software development as well as be able to run the 1000’s of GPU compliance tests in a matter of hours thanks to the high performance operation.

For the longest time FPGA-based prototypers would be forced to remove the GPU from the prototype as it used to be too complex to model or the platform did not have the scalability and modularity to handle the size (gate counts) of the GPU. In the above setup the IMG PowerVR Series 6XT is partitioned across four Xilinx Virtex-7 2000T FPGA’s using Synopsys’ prototyping tools. One of the keys to being able to do this is the use of high speed signal multiplexing between the FPGA’s handling the very large number of signals that cross between the FPGA’s. There is also an FPGA being used to manage the interfacing to the host PC, DDR3 and DVI real time connection. This design is over 50 Million ASIC gates but even at this size it’s still one of the smaller GPU configurations.

Imagination’s Colin McKellar presented their use of HAPS at SNUG UK and very shortly the paper will be uploaded to the SNUG Proceedings website found here http://www.synopsys.com/community/snug/pages/proceedings.aspx

Imagination commented in the presentation that they intend to continue to improve this setup expanding the configuration of the GPU as well as implementing the design with ProtoCompiler using HAPS High Speed Time-Domain Pin Multiplexing to increase the performance of the setup. I’m excited by this and promise to blog again as I get more information and am approved to talk about it.

Is there something else you would like to know about this setup? If yes then leave me a comment and I’ll follow up

While I was staying at the Hilton Hotel in Reading the staff decided to give me a nick name, see the food slip below

Yes, Mr. Bacon, I have no idea why they picked this name for me but it’s perfect for me as I love BACON. The hotel offers what I think is the best British Breakfast and of course I use the opportunity to get my fill. I took this picture of one of the courses of my breakfast. I didn’t plan this but I think it looks like a Bacon Cookie Monster

What do you think?

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Posted in Early Software Development, Humor, HW/SW Integration, In-System Software Validation, IP Validation, Real Time Prototyping, System Validation, Use Modes | Comments Off

First Pass Silicon Success with design up and running in 24 hours!

Posted by Michael Posner on May 16th, 2014

Achieving first pass silicon success is always the goal of the project. While a company may plan for a second chip spin they really want first pass silicon success enabling reduced cost and earlier time to market. I ran across this video featuring Peraso and Eric from the DesignWare USB team,  http://youtu.be/DyNyZP8Ysj4 . Now while Peraso do not claim first pass success bringing up a chip in the lab in 24 hours is amazing. Peraso used HAPS FPGA-based prototypes for system validation enabling them to test their software with their RTL implementation before they taped out. As you can tell from the video, Peraso were very, very happy with the fact that they had the silicon up and running in such a short period.

While we are on the subject of videos, here is another featuring the DesignWare HDMI IP and the HAPS-60 series systems. http://youtu.be/Ao-JeWz9g0A

These examples show the power of HAPS for reducing project risk, achieving first pass silicon success and exhibit high performance enabling the validation of very high speed real world interface.

Honestly I’m a little tired this week so I’m going to keep this blog short. A couple of weeks ago I did get the chance to take out one of the best off-road vehicles on the market. While I am used to far more horse power, this one horse power proved sufficient for the activity and we climbed some terrain that not many other modes of transport could reach. Unlike my other hobbies this trek was very relaxing. In addition I did not burn any fossil fuels in the process.

Do you want to meet me in person? Are you going to DAC? If the answer is yes to both drop me a comment and let me know and I’ll be happy to meet.

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Posted in ASIC Verification, Early Software Development, HW/SW Integration, In-System Software Validation, IP Validation, Mick's Projects, Milestones, Project management, Real Time Prototyping, System Validation | Comments Off

The price of support

Posted by Michael Posner on May 9th, 2014

One of the unquantifiable values of a company’s offering is it’s support. Support is very important all the time but more so for a hardware such as FPGA-based prototyping products. You may need support on how to use the platform, on using the software, on using the capabilities or support for debugging and resolving a hardware issue. It’s hard to put a value (price) on support as you don’t really value it until you need it.  I had a personal experience this week which in my eyes speaks to the value of support.

For my birthday last year I was purchased a very nice business style backpack from a company called Everki, it’s the VERSA model. This backpack replaced a high quality backpack that I had used for over 10 years. Based on this you can see that I expect a quality product to last a long if it’s treated well. Well within a year my new backpack had an issue

You can see that the zipped material itself seems to have failed and is coming unstitched. I contacted the company and after confirmation that the backpack was indeed a real Everki backpack they assessed the problem and are going to fix/replace the item. WOW. I like to say that you don’t judge a company by a problem, everyone has problems, you judge a company by the way it resolves them. Everki, just like Synopsys, stands behind its products. This exhibits the value of support IMO. What if I had purchased a cheaper backpack and the same issue occurred? Would the other vendor supported me in the same way, I doubt it very much. Sometimes the saying “You get what you pay for” is very true. This is a premium backpack and along with the premium price I received premium support which makes the investment a smart one. It’s great peace on mind to know that my investment is protected and backed by great service and support from the company.

It would be very hard for me to put a price value on support as I think it’s priceless.

In the market space of FPGA-based prototyping I’ve been told horror stories about support. Examples like the vendor sending the hardware schematic with a note saying “Here you go, debug it yourself”, users unable to get support as the one support engineer at the vendor was on vacation as well as cases of hardware failure and the vendor responding, “buy another one then”.

Don’t fall into the trap of discounting the value of support. IMO it could be the single most important value a vendor provides. Do you have any good or bad support horror stories? I would love to hear about them.

Off topic, did you know that the pic snippet at the top of the blog comes from a marketing campaign that I ran many, many years ago announcing the availability of the Synopsys SmartModel (verification IP’s) ported to the Windows NT platform (yes that old). Below is a picture of the complete poster promotion (yes that’s me in the reflection)

As part of the promotion we mailed (snail mail, remember that) these posters along with a T-Shirt out to over 2000 customer contacts. The Synopsys marketing director at the time thought we were crazy and that the T-Shairt was one of the ugliest he had ever seen… but he still let us do it.

Well he was right, these were the ugliest T-Shirts even our customers had ever seen and the funny thing is that rather than throwing them away or using them to clean the car the customers took the time to send them back to Synopsys. Many of them arrived back with notes stating the fact that the T-Shirts were ugly. This was a huge success, customers took notice of the promotional material sent, can’t ask for more than that in marketing.

Also, look what turned up in my office

Someone read my blog and made their own Foldify creation. This creation was to celebrate 10 years of Synopsys acquiring Accelerant Networks. Nice job!

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Posted in Man Hours Savings, Milestones, Project management, Support | Comments Off

PCIe Gen 3 = 8Gb/s – Prototyping and Protocol expertise

Posted by Michael Posner on May 2nd, 2014

This week I was asked to clarify what the PCIe Gen3 protocol speed is, to confirm, PCIe Gen3 speed is 8Gb/s per lane. PCIe Gen 1 is 2.5Gb/s and PCIe Gen2 is 5Gb/s. Yes I know I’m usually seen as the prototyping guy, (Or Mick “I’m not dead yet” Posner thanks to my pneumonia) but I also happen to double up as a protocol expert. One of the key advantages of FPGA-Based prototyping is the ability to model real world interfaces at speed so to be a prototyping expert you basically have to be a protocol expert as well. The above eye diagram (click image to view full size) is measured on the HAPS-70 (-2) speed grade systems running one of the many DesignWare PCIe Gen3 controller validation tests for interoperability and compliance testing. That is a good looking wide open eye!

I sneaked into the lab and snapped off this picture. (Click on image to view full size)

The little HAPS-70 S12 (-2) speed grade system is perched on top and that large black cable sticking out is the PCIe Gen3 capable cable connection. The cable plugs into a PCIe Gen3 host adapter board that in turn plugs into the host machine. In this specific setup I was told that we have the DesignWare PCIe Gen3 End Point controller modeled in a x4 lane configuration. Yes that’s x4 lanes of PCIe Gen3 so x4 lanes of 8Gb/s. I’m going to try and have the R&D engineer do a little video for me of the system in action as it was very impressive.

Oh, when using the Xilinx built in transceivers (Rocket IO) as the physical link the (-2) speed grade systems are required to model PCIe Gen3. The (-1) Xilinx Virtex-7 2000T devices only support up to 6.6 Gb/s while the (-2) support up to 10.3125 Gb/s thus supporting PCIe Gen3 speeds. Looking for PCIe Gen3 expert advice, go check out the Express Yourself blog

Off topic, spring has sprung in Oregon !! Yay, it was here for a whole 4 days and now we are expecting rain again. This is fine, this is what you expect and grow to love when living in Oregon. The mix of sun and rain makes everything really green, just look at how beautiful this little baby fern is. This is growing in my yard along with a huge amount of moss which is also typical across Oregon.

Click on image to view full size

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Posted in ASIC Verification, FPGA-Based Prototyping, IP Validation, System Validation, Technical, Use Modes | Comments Off