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Breaking The Three Laws
  • About

    Breaking the Three Laws is dedicated to discussing technically challenging ASIC prototyping problems and sharing solutions.
  • About the Author

    Michael (Mick) Posner joined Synopsys in 1994 and is currently Director of Product Marketing for Synopsys' FPGA-Based Prototyping Solutions. Previously, he has held various product marketing, application consultant and technical marketing manager positions at Synopsys. He holds a Bachelor Degree in Electronic and Computer Engineering from the University of Brighton, England.

Archive for the 'Admin and General' Category

Jim Hogan falls prey to HAPS cloak of invisibility

Posted by Michael Posner on 29th April 2013

I used to own a Ford F350 truck and it was huge with the long wheel base, full bed, extended crew cab measuring a length of about 25 feet (8 meters). The problem was that it came installed with a cloak of invisibility. I didn’t know it had a cloak of invisibility when I purchased but soon after while driving it down the freeway (motorway) a small car merged into the side of me. Unsurprisingly I won that battle and when I asked the other driver how it happened they responded “I didn’t see you”. Wait a second my truck is 25 feet long and that day I was towing a 25 feet long fully enclosed car hauler meaning I was over 50 feet long. How do you not see that…….. That’s when I realized that this truck came with the unadvertised cloak of invisibility option.

So what has this got to do with Jim Hogan you all ask….. well read on and find out.

The cloak of invisibility must be an undocumented feature of the HAPS product line as Jim Hogan wrote a complete article on emulation with mention of prototyping and managed not to mention HAPS once (well ok, once but that was in a table and that was the only mention). I should state that I do not know Jim personally and hold nothing against him. Jim’s article was pretty good but I am afraid I have to personally doubt the credibility of the data when the highest quality and most well-known FPGA-Based Prototyping product, HAPS, didn’t get a proper mention. Jim what were you thinking!!!!  Jim’s article focused on emulation but draws reference to FPGA-Based prototyping a number of times which is why I think HAPS should have been included in the article.

I have to believe that this omission was due to the undocumented HAPS cloak of invisibility. Jim; contact me and let’s solve this mystery.

What also got me all riled up was the following;

  • All FPGA-based solutions are “Emulators”

Not so! Jim included FPGA-based prototypes in the discussion – referring to them as “low-capacity emulators” (and never mentioned HAPS). Emulators focus on Verification providing a high level of automation and debug.  FPGA-based prototypes focus on Validation providing the high performance needed for software development and system validation with real world IO. I’ve blogged about the differences in the past (here).  Below is a recap of that incredible blog with simple graphics

I love the above analogy. You own both but depending on the task at hand you pick the right tool for the job.

The following simplifies the difference between Verification and Validation. While they both start with the letter V the goals are very difference which is why both emulation and prototyping play an important part of an SoC’s development.

Oh, I should also apologize for being tardy on my blog post this time around. I’ve been traveling a lot and when weighing up either writing a blog or sleeping, sleep always won.

Posted in Admin and General, ASIC Verification, FPGA-Based Prototyping, Humor | No Comments »

Don’t Forget SNUG SJC !!!!

Posted by Michael Posner on 22nd March 2013

Don’t forget SNUG SJC

http://www.synopsys.com/Community/SNUG/Silicon%20Valley/pages/default.aspx

Mingle with over 2500 over engineers just like you (But of course you are the best)

Posted in Admin and General, FPGA-Based Prototyping | No Comments »

SNUG and FPGA Debug

Posted by Michael Posner on 8th March 2013

This week, I have mostly been eating sushi.

Did you notice my blog title rhymed, SNUG and FPGA Debug, I thought that was pretty catchy.

 Alert, SNUG Silicon Valley is approaching fast, March 25th – 27th. http://www.synopsys.com/Community/SNUG/Silicon%20Valley/pages/default.aspx I’m personally not going to be able to make it down this year so I need you, my readers, to attend and then tell me all about it. There is a dedicated FPGA-based prototyping track and an FPGA implementation track.

 FPGA-Based Prototyping Track Highlights

  • FPGA-Based Prototyping: My BFF FPGA-Based Prototyping Solution: Better, Faster, and Flexible
  • Bring-up and Debug of FPGA-based prototypes: Pest Control, Hunt Down Bugs Like the Experts
  • Hybrid Prototyping 101

 FPGA Track Highlights

  • Designing with Xilinx 7 Series FPGAs: The Essentials for an Integrated Synplify-Vivado Design Flow Targeting Xilinx 7 Series FPGAs
  • Maximizing Productivity on Large FPGA Designs: Methodologies and Techniques for Maximizing Productivity on Large FPGA Designs
  • Synthesis Methods for FPGA-Based Prototyping

While I’m unable to go to the SNUG Silicon Valley event I’m planning on making a special appearance at SNUG UK.

On another note, did you miss the recent live web seminar on “10 ways to debug your FPGA design”? Well if you did don’t worry, the recorded version is available here: https://event.on24.com/eventRegistration/prereg/register.jsp?eventid=579541&sessionid=1&key=1319D5CFF949C3FDAA3F860D951BE1F1&cmp=WEBR-fpga100204-HPW I highly recommend it and it’s presented by Angela Sutton who is an expert in the field.

Yummy sushi picture just for fun.

I’m working on a deep technical blog posting for next week. Well when I say working on I really mean I’ve got an idea for one I just need to formulate my thoughts. Lets see if I can wrangle them by next week.

Posted in Admin and General, FPGA-Based Prototyping, FPMM Methods, Getting Started, Humor, Tips and Traps | No Comments »

FPMM, Live and Face-to-Face

Posted by Doug Amos on 24th August 2011

Blimey, there are a lot of prototypers out there!

The FPMM was released worldwide in March 2011 and already over 2,500 paper and ebook versions of the FPMM have been taken by prototypers worldwide. The feedback has been really encouraging so many, many thanks to all our readers!

As another way to bring prototypers together in order to further share best practices, FPMM originators, Synopsys and Xilinx, along with new prototyping partner National Instruments, are running a series of FPMM workshops. These workshops have already started and will take place at major locations throughout the world until February 2012.

Agenda items of note include . . .

  • Keynote: “Best Practices in Design-for-Prototyping
    • Why FPGA-based prototyping methodology is important to your success
    • The latest technologies and tools for FPGA-based prototyping
  • User experiences and discussion
  • Hands-on lab: advanced scripts and methods to improve prototyping
  • Live demos of prototyping technology from National Instruments, Synopsys and Xilinx
  • Integrating prototyping more closely within SoC project aims

For me, however, the most important thing is that prototypers get a chance to network and share ideas and best practices; starting a conversation that we can continue online at the FPMM forums and here on the blog. I look forward to meeting many new prototyping friends at every FPMM workshop, perhaps at one near you. Your fellow prototypers will be grateful for your participation.

During the hands-on portion you will have the opportunity to put a proven FPGA-based prototyping methodology to work, focusing on design manipulations and useful scripts for prototype management. You will be using Synopsys tools but no prior experience is required.

Go here to learn more and to register. Numbers are limited by the number of workstations available at each venue so, as they always say, “register now to avoid disappointment”. No, I really mean it.

See you at the workshop!

Doug

If you would like to learn more about the FPGA-Based Prototyping Methodology Manual, or to download a copy visit www.synopsys.com/fpmm

Posted in Admin and General, ASIC Verification, FPGA-Based Prototyping, Getting Started | 2 Comments »

FPMM: this changes everything :-)

Posted by Doug Amos on 2nd March 2011

Apparently, there was some kind of announcement today about a tablet computer or something like that. At the same time, there has been another announcement today and here is the summary….

Xilinx and Synopsys have collaborated with numerous end-users to create the first methodology for prototyping. called the FPGA-Based Prototyping Methodology Manual, or FPMM for short.

You can get hold of an electronic copy of the for free at www.synopsys.com/fpmm (you’ll need a Solvnet ID for now) or if you can get along to DVCon, San Jose today, we’d be happy to give you a signed paperback copy. If you’re not in the area then look for it on amazon.com, (not free I’m afraid).

But, even more important than the simple manual is the new online community for prototypers (also at www.sysnopsys.com/fpmm) . We are very grateful to those practitioners who have joined us in creating the FPMM and we are all keen to enable further conversation and information exchange between prototypers worldwide. Come an join in, there’s a very simple registration process but after that, the forums are wide open.

Looking forward to sharing more about the FPMM soon and helping to give prototyping its proper place in the SoC design team.

Doug

p.s. Actually, we love iPad and lately have been using it to test out the eBook version of the FPMM. looking good on the kindle too.

Posted in Admin and General, FPGA-Based Prototyping | No Comments »

From first post to “last post”

Posted by Doug Amos on 10th February 2011

I suppose that every blog must start with high hopes and ambitions. Some achieve them but many do not. From the first post of bright dreams shared, to the “last post” metaphorically sounded by the lone bugle of a years-out-of-date comment, can seem a daunting slope.

So why is this blog going to be any different?

Because it is the blog of the prototypers, by the prototypers, for the prototypers (to our American friends, please pardon a couple of Brits paraphrasing the Gettysburg address).

Massed behind the banner of this blog is a host of silent experts; not only within Synopsys but across a wide number of companies and institutions.

In the labs of the world, teams are using FPGAs to create a temporary version of their design for verification purposes. They do it using a huge variety of methods, tools and platforms but with the same general aim of creating the fastest, most-accurate pre-silicon models of their design. Then, mostly, they give them to software engineers to use, but that’s another story for another post.

For Mick and I, the aim of this blog is clear; to be an amplifier for the voices of those prototypers, to share news of ideas and methods that effect prototypers our day-to-day activities and along the way, maybe we can make the rest of the SoC community sit up and take more notice of us.

We will  be welcoming guest bloggers, and we will discuss many concepts and methods and look forward to reading your comments in reply. In the meantime, watch for big news for prototypers everywhere very soon.

Oh, and we’ll also explain the  blog’s weird title.

In the meantime, we would love to hear from you.

WHAT SUBJECTS WOULD YOU MOST LIKE TO SEE ON THIS PAGE IN THE COMING WEEKS?

Doug

Posted in Admin and General, FPGA-Based Prototyping | No Comments »