Posted by Michael Posner on November 8th, 2013
As we all know FPGA-based prototyping enables early software development, HW/SW integration and system validation but did you also know that HAPS FPGA-based prototyping is also designed to make Eric Huang, PMM for USB IP at Synopsys famous? I’ll be honest, when we designed the HAPS-70 systems we did not highlight this as part of the MRD which shows that sometimes capabilities evolve on their own.
The HAPS-70 is making Eric famous as it’s being used by his R&D team to validate and demonstrate the new 10G USB 3.1 standard. Eric recently published a video documenting the first platform to platform demonstration of 10G USB 3.1 and it’s powered by HAPS-70’s. (Eric-Hollywood-Huang we call him in the office now). There are some very pretty models in the video, HAPS-70 based prototyping models that is. The HAPS-70′s are the real star’s of this video
Eric and his R&D team have been working on 10G USB 3.1 for a while now and a couple of weeks back I cornered Eric in the lab to quiz him on the HAPS-70 usage. The HAPS-70 FPGA-base prototyping solution enabled this team to rapidly develop a validation platform and enabled this demonstration. I’ve mention this before but FPGA-based prototyping is the single best way to wow a customer with functionality implemented in hardware giving the demonstration high credibility.
The Synopsys DesignWare USB R&D team (the stars behind the scenes) were able to prototype both the 10G USB 3.1 Host and 10G USB 3.1 Device using the HAPS-70 platforms. The flexibility and capabilities of the HAPS-70 enables the USB R&D to quickly customize the platforms to meet the designs needs. One of the key parts of the development was a way to connect the two separate platforms together using a standard USB cable while transmitting and receiving at the new higher 10G rates. For this the DesignWare USB R&D developed a custom HAPS Multi-GigaBit daughter boards, MGB for short.
HAPS has had an MGB interface implemented for a number of generations now and there are available off the shelf daughter boards for it such as PCIe, Ethernet and SATA. It’s a very well documented simple daughter board interface with reference designs and the DWC USB R&D team were able to develop this custom USB 3.1 MGB in about two weeks. Now that’s rapid prototyping.
In the 10G USB 3.1 demo you can see that the demonstration uses host machines to run the software that is executing on the USB 3.1 cores. The DesignWare USB 3.1 IP team use the PCIe connected IP validation mode. If you remember I blogged about this IP validation usage mode a couple of months back. The PCIe connection is also hosted via the MGB, this time using the off-the-shelf HAPS PCIe MGB. It can be seen in the picture below, it’s the thick cable sticking out of the HAPS-70 and then connected into the host via a host adapter card. This connection is an off-the-shelf offering for Synopsys so it’s easy to deploy in your designs as well.
I’m going to visit Eric next week and see if I can encroach on his stardom and get myself into one of his videos.
I can’t wait for 10G USB 3.1 to go mainstream. USB 2.0 was revolutionary at the time and USB 3.0 at 5Gb/s was a huge leap forward. Copying files which took minutes with USB 2.0 then took mere seconds with USB 3.0. But then the files got bigger and the copy times started to increase. Hey presto… along comes 10G USB 3.1 to the rescue, yay. Super fast copy, sweet.