HOME    COMMUNITY    BLOGS & FORUMS    Breaking The Three Laws
Breaking The Three Laws
  • About

    Breaking the Three Laws is dedicated to discussing technically challenging ASIC prototyping problems and sharing solutions.
  • About the Author

    Michael (Mick) Posner joined Synopsys in 1994 and is currently Director of Product Marketing for Synopsys' DesignWare USB Solutions. Previously, he was the Director of Product Marketing for Physical (FPGA-based) Prototyping and has held various product marketing, technical marketing manager and application consultant positions at Synopsys. He holds a Bachelor Degree in Electronic and Computer Engineering from the University of Brighton, England.

The Evolution of Synopsys’ Hapstrak

Posted by Michael Posner on May 17th, 2013

I’ve talked about the Hapstrak 3 connectors a number of times but I don’t think I have directly compared the Hapstrak 2 with the newer HapsTrak 3. A little history, Haptrak 2 was backwards compatible with the original Haptrak 1 but the new Hapstrak 3 took a leap forward to provide greater performance and interconnect flexibility.

The HapsTrak specification and the right to purchase Hapstrack connectors is open to all HAPS system users enabling them to quickly build custom daughter boards tailoring the HAPS systems to their desired function. The Hapstrak specification and connector design was developed by Synopsys specifically for use with the HAPS systems.

This is the picture of the original Hapstrak 1 connectors mounted on the HAPS-50 systems

This is a picture of the Hapstrak 2 connectors (with pcb riser) mounted on the HAPS-60 systems

Finally a picture of the Hapstrak 3 connectors mounted on the new HAPS-70 systems

The Hapstrak 3 connector is an off the shelf connector with a customized pin out to meet the specific requirements of FPGA-Based Prototyping. If you are a HAPS user then Synopsys is happy to provide you the Hapstrak specification. We also provide a complementary review service for HAPS customers designing their own daughter boards. This courtesy service includes a review of the form factor, design of HAPS specific capabilities and general checking of PCB design for high performance.

As a reminder the Hapstrak connectors mounted on the HAPS-70 systems are bank and Xilinx Super Logic Region (SLR) matched enabling high performance from the daughter board to the Xilinx part or interconnect flexibility when connecting multiple FPGA’s. Hapstrak 2 was 119 IO’s per connector while Hapstrak 3 is 50 IO’s per connector, higher granularity means less IO waste. The new Hapstrak 3 has over double the performance of the previous connector making it easy to interface at high speed to daughter boards and other connectors via the HAPS interconnect intelligent cables.

Let me know if you want more information on Hapstrak or anything HAPS based.

  • Print
  • Digg
  • StumbleUpon
  • del.icio.us
  • Facebook
  • Twitter
  • Google Bookmarks
  • LinkedIn