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Breaking The Three Laws
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    Breaking the Three Laws is dedicated to discussing technically challenging ASIC prototyping problems and sharing solutions.
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    Michael (Mick) Posner joined Synopsys in 1994 and is currently Director of Product Marketing for Synopsys' FPGA-Based Prototyping Solutions. Previously, he has held various product marketing, application consultant and technical marketing manager positions at Synopsys. He holds a Bachelor Degree in Electronic and Computer Engineering from the University of Brighton, England.

HT 3 Connector Utilization Recommendation

Posted by Michael Posner on December 21st, 2012

I snapped off the picture of the HAPS-70 system below at a recent customer meeting and it gave me the idea for this blog. Other than the fact that the systems look “well sexy” (Yes, usually a term you do not hear used to describe hardware) this picture also highlights the flexible nature of the system interconnect architecture with the high performance coax cables and recommended usage.

The two rows of Hapstrak 3 (HT 3) connectors down the center of the systems have been used for inter-FPGA interconnection. Utilizing these connectors minimizes the cable lengths. As the interconnect architecture provides bank, super logic region and connector 1:1 mapped all trace & delay length matched, timing closure is simplified. It also keeps the systems looking neat and tidy.

The external connectors are used for mounting of daughter boards or for interconnections between multiple systems. This is the recommended way to utilize the highly flexible interconnect architecture of the HAPS-70 systems

Happy Holidays, this is my last blog post for the year. If you have suggestions for Blog Topics for 2013, send me a note with the suggestion

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