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Breaking The Three Laws
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    Breaking the Three Laws is dedicated to discussing technically challenging ASIC prototyping problems and sharing solutions.
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    Michael (Mick) Posner joined Synopsys in 1994 and is currently Director of Product Marketing for Synopsys' FPGA-Based Prototyping Solutions. Previously, he has held various product marketing, application consultant and technical marketing manager positions at Synopsys. He holds a Bachelor Degree in Electronic and Computer Engineering from the University of Brighton, England.

Warning: Some FPGA synthesis warnings may not be all that important, but some of them really are

Posted by Michael Posner on October 5th, 2012

While I was on vaction I promised that the blog would be populated with fact filled articles created by a set of talented guest bloggers. Nice job team, no one posted! That’s the bad news, the good news is that they will no longer make fun of me for my postings questioning my sense of humor and understand that owning a blog is not as easy as it first seems.

Alert, Alert, the article below was created by guest blogger Will Cummings. Yay, Great Job Will !!!

Will spotted wandering across the hills in WA, we lost him for 7 days on this walk-about

Sometime in our lives behind the wheel, just about all of us have experienced the back-seat driver; the one who made our lives miserable by warning us of possible or imagined road hazards at every turn, announcing each and every waypoint, and thus constantly distracting us from the very real obstacles that actually presented themselves on the road ahead.  In fact, according to an unpublished study by the Covington Washington Department of Public Safety, spurious warnings and announcements are responsible for 68.9% of all driving accidents including 97.2% of those involving pregnant goats, and that’s just downtown Covington, not to mention over by Jenson Creek where on any given day there are a lot more pregnant goats given one thing or another.

So that’s why we need to be able to filter out spurious notes and warnings during FPGA synthesis.  Metaphorically speaking, there may well be more pregnant goats in our design than over by Jenson Creek and it’s our job to keep them safe and herd them into the bit file. FPGA synthesis is crucial to each lil’ nanny’s survival and we don’t need any unnecessary distractions. 

So that’s why Synopsys gives you the option to select particular warning messages and hide them. There are always a few warnings that won’t necessarily be resolved.  These warnings are kind of like the old friends we find sleeping on our couch in the morning when we stumble downstairs into the living room.  We just want to be able to ignore them like we’ve always done.  So won’t it be nice if we can make the log file less cluttered by hiding them?  Then we won’t have to listen to them snoring.

On the other hand, some warnings should be regarded as serious errors.  Sort of like that old flame at our last high school reunion, whom we absolutely want to avoid at all costs.  Isn’t it great if we can elevate the priority on that one?  Love hath no fury etc. etc..

Well we got it!  The filter commands are stored in a file called <project_name>.pfl which is created in the  same directory as <project_name>.prj file.   You can filter out Notes, Warnings & Advice, change message priority, change Notes to a Warnings or Errors and/or change Warnings to a Notes or Errors. 

Now perhaps this may not be rocket science.  Certainly there much more highly advanced and many other very useful features we provide; but though it may be humble, from a simple practicality and common-sense perspective, I think that this is actually one of the most asked-for, useful, and popular features we’ve added in recent years.

–//–

If you want Will to guest blog more let him know in the comments. If you don’t want him to blog anymore, let him know that as well <yes I know, that’s evil but such is the reality of a bloggers life>

Will was born in California but grew up in the urban wilds of Minnesota.  He is known for a having invented oxygen and for his volunteer work with tree frogs.   He has five grandchildren and one more on the way.  Will is a graduate of the University of Washington and has been supporting FPGA designs for over 270 years.  He currently resides amidst the plentiful flora and fauna of exurban Seattle with his patient and understanding wife, a couple of cats, and a very large and neurotic English Mastiff. It must be noted that he has never owned a goat and has very little knowledge of them other than the ordinary sort of that one simply picks up through casual conversation.

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