HOME    COMMUNITY    BLOGS & FORUMS    Breaking The Three Laws
Breaking The Three Laws
  • About

    Breaking the Three Laws is dedicated to discussing technically challenging ASIC prototyping problems and sharing solutions.
  • About the Author

    Michael (Mick) Posner joined Synopsys in 1994 and is currently Director of Product Marketing for Synopsys' DesignWare USB Solutions. Previously, he was the Director of Product Marketing for Physical (FPGA-based) Prototyping and has held various product marketing, technical marketing manager and application consultant positions at Synopsys. He holds a Bachelor Degree in Electronic and Computer Engineering from the University of Brighton, England.

I/O, I/O, it’s off to work I go

Posted by Michael Posner on August 15th, 2012

In a related question (refer to my previous blog post) what I/O interfaces do you utilize on your FPGA-based prototype and what are you using that interface for? Below is the latest snapshot of interface usage from the FPMM survey data.

I have a *guess* that much of the USB 2.0 and some of the Ethernet usage is for control and configuration of the prototyping design. I have mixed feelings on the PCI E Gen 2 usage as this is a typical interface used in many designs but it also makes for a high bandwidth streaming interface. For example the Synopsys Universal Multi-Resource Bus, UMRBus for short, makes use of a PCI E interface.

The advantage of the UMRBus over just using a PCI E interface is that the UMRBus provides a high performance and low latency link to the HAPS FPGA-based prototype with zero pin overhead. Add UMRBus capabilities without disrupting your partition! Cool. In addition the UMRBus comes with a ready to utilize software API which makes it simple to integrate into your validation environment.

What are you using your interfaces for and what are they?

  • Print
  • Digg
  • StumbleUpon
  • del.icio.us
  • Facebook
  • Twitter
  • Google Bookmarks
  • LinkedIn