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Breaking The Three Laws
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    Breaking the Three Laws is dedicated to discussing technically challenging ASIC prototyping problems and sharing solutions.
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    Michael (Mick) Posner joined Synopsys in 1994 and is currently Director of Product Marketing for Synopsys' FPGA-Based Prototyping Solutions. Previously, he has held various product marketing, application consultant and technical marketing manager positions at Synopsys. He holds a Bachelor Degree in Electronic and Computer Engineering from the University of Brighton, England.

“What idiot set this deadline?!”

Posted by Doug Amos on December 20th, 2011

Merry Christmas to all our fellow prototypers!

. . . especially those who are trying hard to complete a milestone in their projects before Christmas.

Most of us have probably been there; when the SoC project started months ago, that “get it done by Christmas” deadline seemed a piece of cake, didn’t it? So, where did all the time go? Why do we sometimes find ourselves working long hours in the run up to Christmas (or any other deadline) to get stuff finished?

We think it comes down to the good old setting of expectations. If we have all the data, skills and tools, and others meet their commitments then we can set expectations (and deadlines) which are realistic but fit within the project timescales, even if those timescales itself have to be expanded to allow it. The skills in this case are that extra layer of expertise required to be REAL prototyper. What we mean is, we can take an FPGA expert from any bench and put them into a prototyping project but they will need to add an extra layer of expertise in order to be able to complete projects repeatedly and on time.  That extra layer of expertise gets honed by experience and makes the world’s few thousand prototypers into very valuable, indeed essential, members of any SoC design team.

But it’s not just about skill and experience.

 Make no mistake, good tools or bad tools and make or break a project. Unreliable, under‑performing or late hardware can also waste vast amounts of time. Prototypers can then find themselves in all sorts of bother because they underestimated the work or overestimated the ability of so-called automated tool flows. Blindly believe those seductive promises of a push-button flow here, or exaggerated performance claims there, and you won’t get home for Christmas. By the way, it’s also not much fun for the support guys at the tool vendors who have to back up such claims either.

So how can first time prototypers (and others) avoid setting the wrong expectations and struggling to meet deadlines? The answer seems obvious but I’ll write it anyway. They should talk with the experts.  Seek out others in this very specialist field of FPGA-based Prototyping, even to the point of hiring some consultancy time. Read the FPMM manual, especially chapter 4; “Getting started”. Ask your chosen hardware or tool vendor for examples and check their track record; post questions on public fora, including our own FPMM Forum . After a while, you will be answering such questions for others and helping them set their expectations.

Finally, spare a thought for a person with the toughest deadline of all at this time of year, and that’s Santa Claus (or Father Christmas as we Englishmen call him). Even if only half of us have been good, that’s still billions of deliveries!

We hope he finds you all in time and meets your expectations, but most of all, we wish you and your family joy, health, love and peace, now and for the New Year.

 

 See you in 2012!

Doug and Mick

p.s. please pardon the Microsoft Office clipart; we didnt have time to license new stuff (tough deadline).

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One Response to ““What idiot set this deadline?!””

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