Archive for the 'Wireless' Category

Hello, and welcome to our new blog on the state of custom and AMS IC design at Synopsys. We set out some years ago to address the need for alternatives in custom and analog design software, and with the launch of Galaxy Custom Designer in 2008 we are seeing that vision realized.

Synopsys has amassed a powerful presence in the circuit simulation market. Our flagship products, HSPICE and CustomSim, form the backbone of transistor-level design and verification worldwide. Behind these products is a very talented group of individuals who are hard at work on solving some of the thorniest problems facing the EDA market.

Our own digital and analog IP design groups use these products to provide cutting-edge solutions for tough problems. Our proven AIP is used in designs worldwide and before it gets to you, it’s been through the wringer by a set of designers who have no mercy for bad chips.

I’d like to tell you what we have in store for you on this blog.

We have asked two of our most respected thought leaders in their domains to post entries on this blog:
Kishore Singhal: circuit simulation expertise
Bob Lefferts: a user’s perspective designing with Synopsys’ custom design flow
and, of course, I will continue to post my thoughts on custom design and implementation

In the coming weeks, each blogger will post entries on topics in his domains of expertise. You can expect everything from the technical background of the tools, tips and tricks to make you more productive, and ways to extend and integrate your design flows. And every now and then members of our technical teams will also share their experiences with you.

So thanks for reading this reinvigorated Analog Insights blog today. I can guarantee you—there’s a lot more to come!

Hi All,

I’m still digesting the information overload from ISSCC, but I wanted to share a few highlights and observations. I will follow up with more details in upcoming posts.

1. The program committee did a great job with juxtaposing industry insider-outsider presentations in the Plenary session. H.K. Lim of Samsung presented a vision of very large displays (80 inches) as the center of the digital home, followed brilliantly by Bill Buxton of Microsoft literally taking a different angle with his presentation on surface computing. The 2nd sequence of presenters was Mike Muller of ARM presenting on embedded processing, followed again with a fresh, more visionary outsider perspective by Jeff Hawkins (inventor of the Palm PDA), on Why Can’t A Computer Be More Like A Brain? Jeff’s new company, Numenta, is doing some very interesting work in this area.

2. The (under-reconstruction) San Francisco Marriott (c’mon.. who needs a bar in the lobby just taking up space during the day, when you already have a bar on the top floor with such a great view?) should consider themselves very fortunate that there was not an earthquake or other incident during the conference. With an estimated 3500 people in what is basically the basement, the traffic flow that now forces everyone through a narrow corridor in order to get back to the surface-level lobby is idiotic, dangerous, and probably illegal. There was a major human traffic jam the 1st day at the lunch break, with everyone completely stalled on stair cases and escalators waiting to squeeze through to exit.

3. As expected, the numerous sessions on new accomplishments in AMS design disproves the notion put forth in the press recently that AMS design must go off chip in the new nanometer processes. Texas Instruments, ST Micro, NXP and others showed great working examples of advanced AMS designs all the way down to the 45nm process node.

4. Interesting that the 2 Data Converter sessions were the most popular of any that I attended. My take is that the growing “digital revolution” creates an even greater need for the functions that go in and out to the real Analog World.

5. TI reversed what has been accepted as an inevitable increase in leakage power at smaller process nodes, through very sophisticated on-chip power management. In their 45nm DSP presentation, they showed how new techniques such as back-biasing, actually LOWERED the leakage power compared to their 65nm design. It was also interesting to see how much circuit design goes into power management for other digital designs.

6. The integration of radios on an AMS SoC goes on to higher levels of performance and sophistication for WiMax, 802.11, UWB, mobile video, etc. It is mandatory to achieve this integration in order to achieve cost targets for developing consumer market segments.

More later.

-Mike
SoC ISSCC AMS design leakage power Marriott 45nm