Archive for the 'digital' Category

If you are reading this, you may have had thoughts on blogging yourself, or perhaps you already are a blogger. One of the most valuable lessons that I have learned from writing a blog is how it can be be used for creating and publicizing my personal “brand”. Personal branding is a way to demonstrate the unique expertise and value that you can provide, to potential employers as well as to colleagues in your profession.

I was first introduced to the topic of personal branding in an article for which I was interviewed by EDN magazine; Life after layoffs: How to move forward after a job loss. Since then I have been asked to share my experience as a blogger with others, most recently at a career networking group hosted by Right Management here in Silicon Valley. My “Top 10 ways to attract subscribers to your blog” may be helpful to you in developing your own personal brand through blogging. You can view the slide show of my presentation here: Developing Your Personal Brand Through Blogging.

-Mike

From Merriam-Webster:

red herring: something that distracts attention from the real issue.

There’s been an awful lot of hype published recently on the topic of SPICE tools for analog/mixed-signal verification. As a long-time AMS designer myself, my nose is keenly sensitive to the smell of a red herring; i.e. marketing hype disguised as the solution to a real technical issue. For me, this is especially true when the topic regards the tools of analog design.

Lately I have seen two new breeds of red herring being tossed around, and they have even been given names; “analog fastSPICE” and “digital fastSPICE”. Must be Mr. Red Herring and Mrs. Red Herring… or something like that. Meet the Herrings… isn’t that a new Ben Stiller movie?

Uh oh, I better check… which one do I have? I sure don’t want to be using the wrong one!

This attempt at labeling just reminds me of all the 0 trans fat packaging I see in the grocery stores these days. Ooooh… zero trans fat!! Whoopee!! I’m on my way to a healthy lifestyle now! NOT!

So, let’s address what some marketing campaigns have been calling digital Fast-SPICE. The latest description I read claims that so-called digital Fast-SPICE is a type of simulator that has these characteristics:

• Don’t generate or maintain a DC operating point
• Utilize simplified device models
• Partition into sub-circuits and independently solving the matrix for each
• Use event-driven simulation
• Require block-level simulator tuning
• Utilize hierarchy to represent “redundant” circuitry

It’s true, all of these techniques have been used, some of them in decades past, to speed up transistor-level simulation. Is each and every one of these techniques used in the leading Fast-SPICE simulators today? No, they are not!

You must read the fine print carefully because the truth is in the details, and you don’t get to the facts unless you are willing to read past the hyped-up label. What’s patently not true here is the claim that the use of these techniques necessarily compromises accuracy to such a degree that a new and improved, 0 trans fat version of Fast-SPICE is required for verification of your analog circuit. That is just a big red herring.

In my experience the real issues that designers have with simulators are performance, accuracy, and capacity, followed by ease-of-use. The so-called analog Fast-SPICE tools are claiming true SPICE accuracy 5x-10x faster. Well, first-of-all… can anybody tell me what is TRUE SPICE accuracy? I hate to break it to you, but the real deal ain’t SPICE.. it’s the silicon. Nevertheless, let’s go with that for a minute.

If there is such a thing as TRUE SPICE, for more than 25 years that has been HSPICE. Now, you can check my bio… I work for the company that sells HSPICE, so accuse me of bias if you like. But I used HSPICE way back in 1981, when my personal well being was on the line for getting 1^st silicon to work. So, I know very well of what I write. These are the facts; HSPICE is still the 1^st SPICE simulator that the foundries use for development of new models, calibrated to the latest silicon. It has been that way going back to the days of the level-28 model. So how can any analog Fast-SPICE simulator provide TRUE SPICE accuracy, if it doesn’t share the same device models with HSPICE?

But back to the real issues; performance, accuracy and capacity. Is 5-10X fast enough? Many times it is not. Let’s look at some of those allegedly digital Fast-SPICE techniques. Let’s take partitioning as an example. If you have a critical analog block that is part of a large, mixed-signal SoC, doesn’t it make sense to apply a higher level of accuracy where it is needed, and get better performance where it is not? Breaking down the problem into constituent parts… that’s what engineers do! What’s the alternative? Should designers waste cycles in an analog Fast-SPICE simulator that can’t partition, and can’t simulate non-critical portions of a circuit efficiently? Doesn’t make any sense to me.

Now let’s look at hierarchy, and the ability to exploit redundancy. (That’s generally referred to as isomorphic matching). DOH!!! Is this a bad thing? If you had 10 identical circuit blocks, that were used identically and saw identical loads and stimulus at a given point in time, would you want to waste simulation time repeating the exact same calculations to simulate those blocks 10 times? Engineers are nothing if not compulsively efficient, and that also makes absolutely no sense.

Think about it. Back in college when you were studying circuit analysis, learning all about Kirchoff’s laws and such… did you ever feel the need to solve the same test question 10 times during your final exams? I certainly hope not! Designers may be obsessive at times, but that would just be sick.

I’ll finish with one more supposedly digital technique: block-level simulator tuning. Now, the ironic thing is that that is EXACTLY what an analog Fast-SPICE tool is. It’s tuned for small analog blocks! It doesn’t handle the largest circuits, because it can’t exploit redundancy. If you have digital blocks… forget it! It can’t run fast enough for the largest mixed-signal devices, because it doesn’t do partitioning.

Analog designers know that there is never a free lunch. Trade-offs are what analog designers do for a living. It’s not a matter of analog Fast-SPICE versus digital Fast-SPICE. The real issue is having a tool that can provide the best performance, accuracy, capacity and ease-of-use. Some tools are adept at giving the user the flexibility to make the choice on what is most important. Designers are knowledgeable enough to choose based on the facts. Caveat emptor… let the buyer beware. Don’t be fooled by red herrings and misleading labels.

-Mike

analog digital SPICE Fast SPICE red herring simulation

As design complexity has continued to increase with the ongoing advances prescribed by Moore’s Law, it has become generally accepted that verification consumes more of a project’s time than the design itself. In forecasting (logic) designer productivity at future process nodes, the International Technology Roadmap For Semiconductors 2006 Update (ITRS) estimates that the average percentage of a project effort spent in verification is currently at 70%. Verification can mean many different things, but here I am primarily referring to functional verification.

For analog designers, my experience has been that verification is a continuous process that is executed as a design develops, from a very low level down to an individual transistor in some cases, progressing up to the completion of a block design then to the assembly of multiple blocks into a complete chip. Analog designers are more likely to think in terms of simulation rather than verification, and in terms of a tool rather than a process or methodology. That is the case at least up to design review time. The design review is well understood, and it can be a very stressful process! In the end though, whether it’s called verification or simulation, the objective is to confirm that the design meets the specifications under (as complete as possible) a range of operating conditions. Many sleepless nights can be spent worrying that something was missed before a critical design review.

For digital designers, there is Verification Methodology. Books are written on the topic, many seminars are given, and an entire industry eco-system has grown up to support verification. Why the difference? One of the more popular books on the subject, the Verification Methodology Manual for System Verilog (VMM), sums it up nicely: “verification methodologies have evolved alongside the design abstraction and kept pace with the complexities of the designs being implemented”. Digital design has evolved as logic synthesis took over for transistor-level design. Hardware description languages evolved into verification languages.

Analog designers, though their productivity has increased tremendously with progressively more powerful tools, must still design at the same level of abstraction as when Moore’s Law was first conceived. So what of analog verification? Is there a need for a more rigorous process and methodology now that analog designs have gotten more complex? Is there a need for an analog verification language? I think that the 2006 ITRS report is actually behind the times here, saying that “In the future, mixed-signal systems will become a more relevant fraction of all silicon developments, bringing the development of proper verification methodologies in this arena to a critical level”. The consumer electronics segment is the major driver for the semiconductor industry today, and all consumer electronics are analog/mixed-signal. That future is now. Is functional verification of mixed-signal systems critical to you? Should we be building a better bridge from analog to digital verification?

In upcoming posts I will discuss some of the concepts and terminology in the VMM digital verification methodology, as a vehicle to facilitate open discussion on how different (or similar) some of the concepts may be from what we are familiar with in analog. We do tend to develop our own languages for the work we do, so maybe a little cross-translation can help.

Analog… meet digital. Digital… meet analog.

-Mike

analog digital ITRS verification methodology

Analog design is Black Magic??? Recently there have been two occurrences where this description of analog design has been used; a panel discussion at the IEEE SOC Conference in Taiwan (09/27/07), and Mike Santarini’s blog (09/18/07) at EDN Magazine.

From the Cambridge Dictionary online:
black magic noun
a type of magic that is believed to use evil spirits (= beings which cannot be seen) to do harmful things

That’s a pretty derogatory description of analog design, in my opinion. Where does this misguided notion come from? Is analog design so hard that non-designers think it must be black magic?

Here’s my definition of analog design:
analog design noun

1. An art practiced by skilled engineers who possess the creativity and expertise to construct high performance circuits from individual transistors and passive components.
2. May appear to be magic compared to digital design

Yes… transistors and circuits, not gates and RTL. Take the simple case of a 2-transistor inverter. To a digital designer it’s quite simple; B = not A (or A’).

Now let’s take an analog view of the same two transistors. To an analog designer, we can make those two transistors into an amplifier: v_b = g_mv_ar_o, g_m = C_g·W/L· (v_a-vt₀)

In the digital case the designer is an expert in logic or writing RTL, and the circuit details are accounted for by a synthesizer. In the analog case the designer is a circuit expert, and the (increasingly complex and variable) device model details are accounted for in a simulator.

That doesn’t make either analog or digital design black magic! But both cases provide excellent examples of how advances in EDA tools have contributed to increased designer productivity and IC innovation. I have to address one of the EDN blog commenters who claimed “it will be a very unusual moment when someone actually comes up with an analog EDA tool that helps an analog designer”. Wow, and I thought the “black magic” myth was bad!

Unusual to make an analog EDA tool that helps a designer? Not hardly! The problem is that the first introduction of the analog designer’s primary EDA tool came before any of these folks were paying attention, in fact before there even was an EDA industry… and it was SPICE! Ten years from now, when logic synthesis has established as long a history as circuit simulation, I wouldn’t be surprised to hear the same type of comments about digital EDA.

SPICE created just as big a paradigm shift as Design Compiler did, it just came about 10-15 years earlier. If you look back at how IC design was done before SPICE simulation became so pervasive, you would see that breadboard prototyping with discrete transistors, paper & pencil, maybe even a slide rule calculation, were the only tools available. Can anyone imagine designing a 5GHz RF SoC in CMOS without modern analog EDA tools, starting with simulation? And that’s just one example of leading edge analog design from the most recent ISSCC.

The EDA industry certainly has not stood still on progress in analog tools. I could go on and on about layout tools, optimizers, waveform analyzers and many more, but let’s just look at analog circuit simulation. There have been more than thirty years of major innovations in circuit simulation that have powered the advances in analog design that some apparently seem to find so mysterious.

Here is a list of just a few of the significant advances in circuit simulation over the last 35 years:

• 1971: SPICE 1.0
• 1978: SPICE-2g6
• 1981: HSPICE – the 1st successful commercial SPICE. The Level-28 model
• 1989: SPICE-3
• 1995: 1st generation Fast-SPICE, SPICE-HDL co-simulation
• 1996: BSIM-3 model
• 1996: Introduction of Verilog-A behavioral modeling
• 2000: 2nd generation hierarchical Fast-SPICE, Verilog-AMS
• 2007: Multi-threading and parallel SPICE, new special-purpose Fast-SPICE engines

Analog design. An art. A science. A rare skill. But black magic it’s not!

I welcome your comments.

-Mike

Welcome to “Analog Insights”

Let’s start by asking the question, what exactly is an analog insight? Something that I heard just last week in a keynote address at BMAS-2007 (IEEE Behavioral Modeling and Simulation Workshop) sums it up for me. This came from San Nassif of IBM, who spoke on the evolution of “Model to Hardware Correlation for Nanometer Technologies”. In his presentation he made the point that the semiconductor industry changed from chip engineering to chip computer science after Mead & Conway.

For those of you who weren’t around back then, Mead & Conway published the seminal text “Introduction to VLSI Systems” back in 1980. This was a few years before Design Compiler was invented. “VLSI Systems” proposed the revolutionary (at the time) idea that the process of IC design could be automated to the point that engineers would not need to know anything about transistors. Well, this was just blasphemy to analog engineers like myself back then!

Now, in 2007, chip computer science such as RTL to gate-level synthesis is taken for granted in digital design methodologies. But chip engineering and analog design never went away, and nanometer effects now dictate that that all IC design requires careful chip engineering once again. Nanometer design requires an analog insight into transistor-level behavior such as device variability, leakage, dynamic IR drop, electromigration, crosstalk… all analog effects that render what was formerly a simple binary view of the world with a great deal of uncertainty. At the same time, analog designers have continued to do amazing things in advancing the state of their art while transistors and operating voltages continue to shrink and make their lives more difficult. A lot of analog insight is required to be able to design analog, mixed-signal, and RF functions on an SoC with millions of digital transistors. But without that insight, the consumer electronics that we are all so accustomed to would not exist.

My hope is that this blog will become a lively place to discuss a wide range of analog insights. Hopefully, the insights will come not just from me, but from the readers of this blog who live with these issues on a daily basis.

To kick things off, here is a list of topics that come to mind. What are your insights?

1. What is the most difficult aspect of the analog design process? What is the most enjoyable?
2. If you could have any one tool to make your job easier, what would it be?
3. Are analog engineers truly different from digital engineers?
4. What made you choose analog design over a different career?
5. What applications are you working on; consumer electronics, wireless communication, networking, power management, etc., etc.?
6. What process technology are you working in?
7. If you have been doing analog for a while, do you think the tools have gotten better or stayed the same?
8. Do shrinking processes make analog design more difficult?
9. What part of your job do you wish you could hand off to someone else to do?
10. How does it feel to get working silicon back for a new design? Is that the buzz that keeps you doing this, or if not, what is?
11. Do you worry about digital technology eliminating the need for analog?
12. How do you interface to the digital engineers? Do you work in digital as well?
13. Do you use programming or modeling languages: Verilog, Verilog-AMS, etc.?

-Mike
Analog Insights