HOME    COMMUNITY    BLOGS & FORUMS    Analog Insights: Analog/Mixed-Signal Design and Verification Blog
Analog Insights: Analog/Mixed-Signal Design and Verification Blog

VCS AMS – Synopsys advanced mixed-signal verification solution to accelerate regression testing of mixed-signal SoCs

Posted by Hélène Thibiéroz on March 27th, 2014

 You may have seen Synopsys recent announcement during SNUG:

http://news.synopsys.com/2014-03-25-Synopsys-Unveils-Advanced-Mixed-Signal-Verification-Initiative-to-Accelerate-Regression-Testing-of-Mixed-Signal-SoCs

In a few words, Synopsys is announcing an initiative to accelerate regression testing of mixed-signal SoCs. As part of the initiative, Synopsys is rolling out a SystemVerilog-based methodology, AMS Testbench, and the new VCS® AMS mixed-signal verification solution that incorporates VCS functional verification and the CustomSim™ FastSPICE simulator.

You are going to ask me, what is VCS AMS?

VCS AMS is Synopsys’ advanced mixed-signal verification solution, incorporating VCS functional verification and the CustomSim™ FastSPICE simulator, to deliver advanced functional and low-power verification technologies combined with industry-best performance and capacity for faster mixed-signal SoC regression testing.

VCS AMS

 

What are the capabilities and benefits of VCS AMS?

VCS AMS key capabilities and benefits are:

  • Industry-best performance and capacity from tight integration of VCS functional verification and CustomSim FastSPICE simulator to accelerate regression testing of mixed-signal SoCs with transistor-level accuracy
  • AMS Testbench enables design teams to rapidly extend their existing UVM-based digital verification environments for mixed-signal SoC regression testing
  • Mixed-signal low-power verification with VCS native low power (NLP) technology, supporting UPF, for mixed-signal designs quickly identifies power management design errors during simulation
  • Support for complex design architectures mixing SPICE, Verilog, VHDL, SystemVerilog, Verilog-A and Verilog-AMS enables quicker development of mixed-signal verification environment
  •  Save and restore capability enables faster regression testing throughput by resuming simulation from a previously-saved initialization state

 

By leveraging industry-best mixed-signal verification performance and capacity, a proven SystemVerilog-based verification methodology extended for mixed signal and advanced functional and low power verification technologies, VCS AMS provides not only a faster solution of mixed-signal SoC verification but also a superior environment to rapidly deploy constrained-random testbench in a mixed-signal regression environment.          

More information can be found at:

http://www.synopsys.com/Tools/Verification/AMSVerification/Pages/vcs-ams-ds.aspx

If you would like to receive even more information on VCS AMS :) , please contact me anytime.

  • Print
  • Digg
  • del.icio.us
  • Facebook
  • Google Bookmarks
  • LinkedIn
  • RSS
  • Twitter

Leave a Reply

XHTML: You can use these tags: <a href="" title=""> <abbr title=""> <acronym title=""> <b> <blockquote cite=""> <cite> <code> <del datetime=""> <em> <i> <q cite=""> <strike> <strong>